diff options
| author | Peter Chen <peter.chen@freescale.com> | 2013-12-26 09:56:21 +0800 |
|---|---|---|
| committer | Peter Chen <peter.chen@freescale.com> | 2014-01-07 10:39:38 +0800 |
| commit | 0960fed5ef98ad923d79aaf2279e54a83990adef (patch) | |
| tree | 121eb0d75ca8dc2d6da0a9ba522acc62c155fea1 /Documentation | |
| parent | 892474ba8d55955eff480897023fe36e4d91c185 (diff) | |
ENGR00291282-1 usb: doc: ci13xxx-imx: update for hsic controller
Update for hsic controller
Signed-off-by: Peter Chen <peter.chen@freescale.com>
Diffstat (limited to 'Documentation')
| -rw-r--r-- | Documentation/devicetree/bindings/usb/ci13xxx-imx.txt | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/usb/ci13xxx-imx.txt b/Documentation/devicetree/bindings/usb/ci13xxx-imx.txt index 226ca0689d57..8d58c8ce91ca 100644 --- a/Documentation/devicetree/bindings/usb/ci13xxx-imx.txt +++ b/Documentation/devicetree/bindings/usb/ci13xxx-imx.txt @@ -24,6 +24,12 @@ If the user wants to use charger IC's usb charger detection capabilities, please do not set it. - fsl,anatop: phandle for anatop module, anatop module is only existed at imx6 SoC series +- pinctrl-names: for names of hsic pin group +- pinctrl-0: hsic "idle" pin group +- pinctrl-1: hsic "active" pin group +- osc-clkgate-delay: the delay between powering up the xtal 24MHz clock + and release the clock to the digital logic inside the analog block, + 0 <= osc-clkgate-delay <= 7. Examples: usb@02184000 { /* USB OTG */ @@ -36,4 +42,8 @@ usb@02184000 { /* USB OTG */ external-vbus-divider; imx6-usb-charger-detection; fsl,anatop = <&anatop>; + pinctrl-names = "idle", "active"; + pinctrl-0 = <&pinctrl_usbh2_1>; + pinctrl-1 = <&pinctrl_usbh2_2>; + osc-clkgate-delay = <0x3>; }; |