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authorAnson Huang <b20788@freescale.com>2015-05-01 15:10:29 +0800
committerNitin Garg <nitin.garg@freescale.com>2015-09-17 09:22:54 -0500
commit32aa8b97331c4717640c1e7bb693ce386b2b2249 (patch)
treede7a4bff034010a7ef3058c05de0005a2902da58 /Documentation
parent9f3289ff0bca8259b252eefd0bd07912f752aa50 (diff)
MLK-10788-1 ARM: dts: imx: rename busfreq compatible string
Rename busfreq compatible string name from "fsl,imx6_busfreq to "fsl,imx_busfreq". Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'Documentation')
-rw-r--r--Documentation/devicetree/bindings/arm/imx/busfreq-imx.txt (renamed from Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt)4
1 files changed, 2 insertions, 2 deletions
diff --git a/Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt b/Documentation/devicetree/bindings/arm/imx/busfreq-imx.txt
index 93386a87b197..daa3384be688 100644
--- a/Documentation/devicetree/bindings/arm/imx/busfreq-imx6.txt
+++ b/Documentation/devicetree/bindings/arm/imx/busfreq-imx.txt
@@ -4,7 +4,7 @@ It is a generic driver that manages the frequency of the DDR, AHB and AXI buses
It works for both SMP and UP systems and for both DDR3 and LPDDR2 memory types.
Required properties are listed below:
-- compatible: should be "fsl,imx6_busfreq"
+- compatible: should be "fsl,imx_busfreq"
- clocks: Lists the various clocks used by the busfreq driver
- interrupts - Lists the interrupts used by the busfreq driver. This is needed only for SMP architecutre.
- fsl,max_ddr_freq - The max ddr freq for this chip
@@ -12,7 +12,7 @@ Required properties are listed below:
Examples:
For SOC imx6q.dtsi:
busfreq { /* BUSFREQ */
- compatible = "fsl,imx6_busfreq";
+ compatible = "fsl,imx_busfreq";
clocks = <&clks 171>, <&clks 6>, <&clks 11>, <&clks 104>, <&clks 172>, <&clks 58>,
<&clks 18>, <&clks 60>, <&clks 20>, <&clks 3>;
clock-names = "pll2_bus", "pll2_pfd2_396m", "pll2_198m", "arm", "pll3_usb_otg", "periph",