diff options
| author | Thomas Petazzoni <thomas.petazzoni@free-electrons.com> | 2013-04-12 16:29:07 +0200 |
|---|---|---|
| committer | Jason Cooper <jason@lakedaemon.net> | 2013-04-15 15:00:17 +0000 |
| commit | b18ea4dc7746f1270bbe3a0817f9a034eec031a8 (patch) | |
| tree | d7043bd99e911ad6bfd84eebabe5a85d27f09fe7 /arch/arm/boot/dts/armada-xp.dtsi | |
| parent | 1b2529d018b7f8e3faa0011a49116d4df9e44777 (diff) | |
ARM: dts: mvebu: move all peripherals inside soc
reorganize the .dts and .dtsi files so that all devices are under the
soc { } node (currently some devices such as the interrupt controller,
the L2 cache and a few others are outside).
Signed-off-by: Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
Diffstat (limited to 'arch/arm/boot/dts/armada-xp.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/armada-xp.dtsi | 32 |
1 files changed, 16 insertions, 16 deletions
diff --git a/arch/arm/boot/dts/armada-xp.dtsi b/arch/arm/boot/dts/armada-xp.dtsi index 29dfeb6d4a26..ef3d41362241 100644 --- a/arch/arm/boot/dts/armada-xp.dtsi +++ b/arch/arm/boot/dts/armada-xp.dtsi @@ -22,25 +22,25 @@ model = "Marvell Armada XP family SoC"; compatible = "marvell,armadaxp", "marvell,armada-370-xp"; - L2: l2-cache { - compatible = "marvell,aurora-system-cache"; - reg = <0xd0008000 0x1000>; - cache-id-part = <0x100>; - wt-override; - }; + soc { + L2: l2-cache { + compatible = "marvell,aurora-system-cache"; + reg = <0xd0008000 0x1000>; + cache-id-part = <0x100>; + wt-override; + }; - mpic: interrupt-controller@d0020000 { - reg = <0xd0020a00 0x2d0>, - <0xd0021070 0x58>; - }; + mpic: interrupt-controller@d0020000 { + reg = <0xd0020a00 0x2d0>, + <0xd0021070 0x58>; + }; - armada-370-xp-pmsu@d0022000 { - compatible = "marvell,armada-370-xp-pmsu"; - reg = <0xd0022100 0x430>, - <0xd0020800 0x20>; - }; + armada-370-xp-pmsu@d0022000 { + compatible = "marvell,armada-370-xp-pmsu"; + reg = <0xd0022100 0x430>, + <0xd0020800 0x20>; + }; - soc { serial@d0012200 { compatible = "snps,dw-apb-uart"; reg = <0xd0012200 0x100>; |