diff options
| author | Jon Mason <jonmason@broadcom.com> | 2016-02-05 17:43:23 -0500 |
|---|---|---|
| committer | Florian Fainelli <f.fainelli@gmail.com> | 2016-02-12 15:54:52 -0800 |
| commit | 7c3fe8a1f6d1d2287de5dc8cbfc901a0a2d71838 (patch) | |
| tree | 5fef4501466c77fba59d06ff067b3fa98dcdbbe7 /arch/arm/boot/dts/bcm-nsp.dtsi | |
| parent | a0efb0d28b77e481704b67a419d36a789e16beaa (diff) | |
ARM: dts: NSP: Add SP805 Support to DT
Add support for the ARM SP805 Watchdog timer to the Northstar Plus
device tree.
Signed-off-by: Jon Mason <jonmason@broadcom.com>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
Diffstat (limited to 'arch/arm/boot/dts/bcm-nsp.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/bcm-nsp.dtsi | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/bcm-nsp.dtsi b/arch/arm/boot/dts/bcm-nsp.dtsi index bed67017f9d0..def9e783b5c6 100644 --- a/arch/arm/boot/dts/bcm-nsp.dtsi +++ b/arch/arm/boot/dts/bcm-nsp.dtsi @@ -233,6 +233,14 @@ clock-frequency = <100000>; }; + watchdog@39000 { + compatible = "arm,sp805", "arm,primecell"; + reg = <0x39000 0x1000>; + interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&iprocslow>, <&iprocslow>; + clock-names = "wdogclk", "apb_pclk"; + }; + lcpll0: lcpll0@3f100 { #clock-cells = <1>; compatible = "brcm,nsp-lcpll0"; |