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authorMarc Zyngier <marc.zyngier@arm.com>2017-01-18 09:27:28 +0000
committerArnd Bergmann <arnd@arndb.de>2017-02-07 15:06:46 +0100
commit387720c93812f1e702c20c667cb003a356e24a6c (patch)
tree36b3c401f3057808d05b166c423b46137635b7f6 /arch/arm/boot/dts/ecx-2000.dts
parent1defa60e5dc43eccc6cd50deb8f39b5ee5c52463 (diff)
ARM: DTS: Fix register map for virt-capable GIC
Since everybody copied my own mistake from the DT binding example, let's address all the offenders in one swift go. Most of them got the CPU interface size wrong (4kB, while it should be 8kB), except for both keystone platforms which got the control interface wrong (4kB instead of 8kB). In a few cases where I knew for sure what implementation was used, I've added the "arm,gic-400" compatible string. I'm 99% sure that this is what everyone is using, but short of having the TRM for all the other SoCs, I've left them alone. Acked-by: Shawn Guo <shawnguo@kernel.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Acked-by: Krzysztof Kozlowski <krzk@kernel.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Acked-by: Antoine Tenart <antoine.tenart@free-electrons.com> Acked-by: Arnd Bergmann <arnd@arndb.de> Acked-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Javier Martinez Canillas <javier@osg.samsung.com> Signed-off-by: Marc Zyngier <marc.zyngier@arm.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/boot/dts/ecx-2000.dts')
-rw-r--r--arch/arm/boot/dts/ecx-2000.dts2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/ecx-2000.dts b/arch/arm/boot/dts/ecx-2000.dts
index 2ccbb57fbfa8..c15e7e0c7e08 100644
--- a/arch/arm/boot/dts/ecx-2000.dts
+++ b/arch/arm/boot/dts/ecx-2000.dts
@@ -99,7 +99,7 @@
interrupt-controller;
interrupts = <1 9 0xf04>;
reg = <0xfff11000 0x1000>,
- <0xfff12000 0x1000>,
+ <0xfff12000 0x2000>,
<0xfff14000 0x2000>,
<0xfff16000 0x2000>;
};