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authorAlexander Shiyan <shc_work@mail.ru>2013-11-30 10:18:04 +0400
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 21:33:09 +0800
commit6ece55b39218d35d44e050d6e47b28a6489edd2b (patch)
tree5e6aa758a60d94de6db506bfbe34cc32e4321e66 /arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
parentf64ba746827ea23510659ebcacc84a1c6120eda4 (diff)
ARM: dts: i.MX27 boards: Switch to use standard GPIO and IRQ flags definitions
Signed-off-by: Alexander Shiyan <shc_work@mail.ru> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts')
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts9
1 files changed, 5 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
index be7667e73a2e..834fde84186e 100644
--- a/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
+++ b/arch/arm/boot/dts/imx27-phytec-phycore-rdk.dts
@@ -16,7 +16,8 @@
&cspi1 {
fsl,spi-num-chipselects = <2>;
- cs-gpios = <&gpio4 28 0>, <&gpio4 27 0>;
+ cs-gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>,
+ <&gpio4 27 GPIO_ACTIVE_LOW>;
};
&i2c1 {
@@ -65,8 +66,8 @@
&sdhci2 {
bus-width = <4>;
- cd-gpios = <&gpio3 29 0>;
- wp-gpios = <&gpio3 28 0>;
+ cd-gpios = <&gpio3 29 GPIO_ACTIVE_HIGH>;
+ wp-gpios = <&gpio3 28 GPIO_ACTIVE_HIGH>;
vmmc-supply = <&vmmc1_reg>;
status = "okay";
};
@@ -90,7 +91,7 @@
compatible = "nxp,sja1000";
reg = <4 0x00000000 0x00000100>;
interrupt-parent = <&gpio5>;
- interrupts = <19 0x2>;
+ interrupts = <19 IRQ_TYPE_EDGE_FALLING>;
nxp,external-clock-frequency = <16000000>;
nxp,tx-output-config = <0x16>;
nxp,no-comparator-bypass;