diff options
| author | Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com> | 2013-03-09 14:59:08 +0100 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2013-04-09 22:52:51 +0800 |
| commit | a15ac4a640264c94e56603159147244c1e75feda (patch) | |
| tree | afdc2827fdf5563a2d75163c03b0f91ca5662dff /arch/arm/boot/dts/imx51.dtsi | |
| parent | e910b45c9d6413c057fc0aaf8616683446bdda7d (diff) | |
ARM: imx51: Add pinctrl for ecspi2
Add ecspi2 group of pins for imx51.
Signed-off-by: Gwenhael Goavec-Merou <gwenhael.goavec-merou@armadeus.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx51.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx51.dtsi | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi index 6e14b7574343..7e09ccfd0b29 100644 --- a/arch/arm/boot/dts/imx51.dtsi +++ b/arch/arm/boot/dts/imx51.dtsi @@ -317,6 +317,16 @@ }; }; + ecspi2 { + pinctrl_ecspi2_1: ecspi2grp-1 { + fsl,pins = < + MX51_PAD_NANDF_RB3__ECSPI2_MISO 0x185 + MX51_PAD_NANDF_D15__ECSPI2_MOSI 0x185 + MX51_PAD_NANDF_RB2__ECSPI2_SCLK 0x185 + >; + }; + }; + esdhc1 { pinctrl_esdhc1_1: esdhc1grp-1 { fsl,pins = < |