diff options
| author | Bai Ping <b51503@freescale.com> | 2015-08-12 21:55:49 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@nxp.com> | 2016-01-14 10:59:45 -0600 |
| commit | 4d1287d313b489b8667dca9247fb2af6a3b2b1e1 (patch) | |
| tree | 8fe2a96eb008492eed2986348ed202b090720efa /arch/arm/boot/dts/imx6dl.dtsi | |
| parent | cef13fcd3319515e164dec2e19bb30dbba38e83d (diff) | |
MLK-11343-03 ARM: dts: imx: add clocks in cpu mode
Add pll1, pll1_bypass and pll1_bypass_src clock
reference define in dts file.
Signed-off-by: Bai Ping <b51503@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6dl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index b2bca911c9bc..cb72bcd872d7 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -43,9 +43,13 @@ <&clks IMX6QDL_CLK_PLL2_PFD2_396M>, <&clks IMX6QDL_CLK_STEP>, <&clks IMX6QDL_CLK_PLL1_SW>, - <&clks IMX6QDL_CLK_PLL1_SYS>; + <&clks IMX6QDL_CLK_PLL1_SYS>, + <&clks IMX6QDL_CLK_PLL1>, + <&clks IMX6QDL_PLL1_BYPASS>, + <&clks IMX6QDL_PLL1_BYPASS_SRC>; clock-names = "arm", "pll2_pfd2_396m", "step", - "pll1_sw", "pll1_sys"; + "pll1_sw", "pll1_sys", "pll1", + "pll1_bypass", "Pll1_bypass_src"; arm-supply = <®_arm>; pu-supply = <®_pu>; soc-supply = <®_soc>; |