diff options
| author | Philipp Zabel <p.zabel@pengutronix.de> | 2014-11-11 19:12:47 -0200 |
|---|---|---|
| committer | Shawn Guo <shawn.guo@linaro.org> | 2014-11-23 15:08:12 +0800 |
| commit | a04a0b6fed4fd3ffdf0abd92686fca90bc3e5f38 (patch) | |
| tree | 5ea050e66642b7b3585d5b58cab7101a2dd2366d /arch/arm/boot/dts/imx6dl.dtsi | |
| parent | 367415d338e4a48ead42f653c9e3e9171ebf00cc (diff) | |
ARM: dts: imx6qdl: Enable CODA960 VPU
This patch adds links to the on-chip SRAM and reset controller nodes
and switches the interrupts. Make the BIT processor interrupt, which exists on
all variants, the first one. The JPEG unit interrupt, which does not exist on
i.MX27 and i.MX5 thus is an optional second interrupt.
Use different compatible strings for i.MX6Q/D and i.MX6S/DL, as they have to
load separate firmware images for some reason.
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
Signed-off-by: Fabio Estevam <fabio.estevam@freescale.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6dl.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx6dl.dtsi | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi index 44d887656712..1ac2fe732867 100644 --- a/arch/arm/boot/dts/imx6dl.dtsi +++ b/arch/arm/boot/dts/imx6dl.dtsi @@ -118,3 +118,7 @@ "di0_sel", "di1_sel", "di0", "di1"; }; + +&vpu { + compatible = "fsl,imx6dl-vpu", "cnm,coda960"; +}; |