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authorTroy Kisky <troy.kisky@boundarydevices.com>2013-12-16 18:12:53 -0700
committerShawn Guo <shawn.guo@linaro.org>2014-02-09 21:29:22 +0800
commit473f0fc06008f240a47e5207f3fdf31beaf63214 (patch)
tree83a402ec46d73e27192a2fbed324be61fd57c8a5 /arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
parent0e06842fb7e73af038ccbf409080349e902e3f4b (diff)
ARM: dts: imx6qdl-sabrelite: move USDHC3 CD/WP to pinctrl_usdhc3
This patch moves pin SD3_DAT5/4 (CD/WP) from pinctrl_hog to pinctrl_usdhc3. It also explicitly sets the pad SD3_DAT5 to 0x1b0b0, which is also the value that it has before this patch if using mainline u-boot. Signed-off-by: Troy Kisky <troy.kisky@boundarydevices.com> Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/boot/dts/imx6qdl-sabrelite.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6qdl-sabrelite.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
index d5629a50fc06..b4646c46f02d 100644
--- a/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabrelite.dtsi
@@ -117,8 +117,6 @@
MX6QDL_PAD_EIM_D19__GPIO3_IO19 0x80000000
MX6QDL_PAD_EIM_D22__GPIO3_IO22 0x80000000
MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000
- MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000
- MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0
MX6QDL_PAD_GPIO_0__CCM_CLKO1 0x80000000
>;
};
@@ -196,6 +194,8 @@
MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+ MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x1b0b0 /* CD */
+ MX6QDL_PAD_SD3_DAT4__GPIO7_IO01 0x1f0b0 /* WP */
>;
};