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authorHaibo Chen <haibo.chen@nxp.com>2019-09-26 16:54:36 +0800
committerDong Aisheng <aisheng.dong@nxp.com>2019-11-25 16:07:59 +0800
commit04461eca5e1464f3e3c0ea47aa795ce0206c68e6 (patch)
tree9236fd81aa9b0a3b67f1ae5915d59b93887fcb53 /arch/arm/boot/dts/imx6sll.dtsi
parent5643e0913def81943fe0076ef7363b88f6a2b691 (diff)
ARM: dts: imx6sll: change the usdhc compatible
Change the usdhc compatible to make it support hs400 mode. Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6sll.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6sll.dtsi6
1 files changed, 3 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/imx6sll.dtsi b/arch/arm/boot/dts/imx6sll.dtsi
index 5b41afe63b0a..39efe6144370 100644
--- a/arch/arm/boot/dts/imx6sll.dtsi
+++ b/arch/arm/boot/dts/imx6sll.dtsi
@@ -759,7 +759,7 @@
};
usdhc1: mmc@2190000 {
- compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
+ compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc";
reg = <0x02190000 0x4000>;
interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SLL_CLK_USDHC1>,
@@ -773,7 +773,7 @@
};
usdhc2: mmc@2194000 {
- compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
+ compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc";
reg = <0x02194000 0x4000>;
interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SLL_CLK_USDHC2>,
@@ -787,7 +787,7 @@
};
usdhc3: mmc@2198000 {
- compatible = "fsl,imx6sll-usdhc", "fsl,imx6sx-usdhc";
+ compatible = "fsl,imx6sll-usdhc", "fsl,imx7d-usdhc";
reg = <0x02198000 0x4000>;
interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6SLL_CLK_USDHC3>,