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authorAllen Xu <b45815@freescale.com>2014-12-10 06:12:00 +0800
committerNitin Garg <nitin.garg@nxp.com>2016-01-14 11:02:36 -0600
commitad2287d3213457e598941e20c8e08c46768066ec (patch)
tree375f039ee62202ada76f028ba8c6a051d1f8744b /arch/arm/boot/dts/imx6sx-19x19-arm2-gpmi-weim.dts
parent12234ff6a61bbd396538a5826dc35c9de4defb06 (diff)
MLK-9976: ARM: dts: NAND BBT inconsistency causes UBIFS randomly mount failed
NAND scans the bad blocks during kernel boots up, which invokes the gpmi_ecc_read_oob function to check the badblock mark for each block. In this function the oob data was raw read from NAND chip without ECC, so it hardly to guarantee the consistency of the data considering the possible bitflips. It found that in some MLC NAND the oob data changed and consequently the BBT changed in different power cycles. This issue may cause the UBIFS mount failed. To fix this issue, add "nand_on_flash_bbt" option in dts to store the BBT in NAND flash. On the first time kernel boot up, all bad blocks and probably some fake bad block would be recognized and be recorded in on-nand bad block table. From the second time boot, kernel will read BBT from NAND Flash rather than calling gpmi_ecc_read_oob function to check bad block. No bad block would be missed when create BBT since the probability that 16bit bad block mark filps from 0x00 to 0xFF is extremely low. Signed-off-by: Allen Xu <b45815@freescale.com> (cherry picked and merge from commit d957353768a1b6d39b340b9d10b22fc42b0aa8e2) (cherry picked from commit 7b7d3d683a24b23f33d6c08874f31fe50ef2fc76)
Diffstat (limited to 'arch/arm/boot/dts/imx6sx-19x19-arm2-gpmi-weim.dts')
-rw-r--r--arch/arm/boot/dts/imx6sx-19x19-arm2-gpmi-weim.dts1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6sx-19x19-arm2-gpmi-weim.dts b/arch/arm/boot/dts/imx6sx-19x19-arm2-gpmi-weim.dts
index 88d1cdb0d5f4..a50f335adb80 100644
--- a/arch/arm/boot/dts/imx6sx-19x19-arm2-gpmi-weim.dts
+++ b/arch/arm/boot/dts/imx6sx-19x19-arm2-gpmi-weim.dts
@@ -16,4 +16,5 @@
pinctrl-names = "default";
pinctrl-0 = <&pinctrl_gpmi_nand_1>;
status = "okay"; /* pin conflict with qspi*/
+ nand-on-flash-bbt;
};