diff options
author | Anson Huang <b20788@freescale.com> | 2015-09-01 01:04:14 +0800 |
---|---|---|
committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:23:14 +0800 |
commit | 5c848ea48913e384a58f1c889761a7948003f3a1 (patch) | |
tree | e71018c19c9448b4fecdb5267bd8c6db056af0bf /arch/arm/boot/dts/imx6ul-9x9-evk.dts | |
parent | cb7fc1df7d793b12b3cc16fd8a825ab5f90f9cc0 (diff) |
MLK-11461-1 ARM: dts: imx6ul: add LDO bypass support for 9x9 EVK
i.MX6UL-9x9-EVK board has PFUZE3000, enable LDO bypass support.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul-9x9-evk.dts')
-rw-r--r-- | arch/arm/boot/dts/imx6ul-9x9-evk.dts | 34 |
1 files changed, 22 insertions, 12 deletions
diff --git a/arch/arm/boot/dts/imx6ul-9x9-evk.dts b/arch/arm/boot/dts/imx6ul-9x9-evk.dts index 45345107c241..ec84ec76b339 100644 --- a/arch/arm/boot/dts/imx6ul-9x9-evk.dts +++ b/arch/arm/boot/dts/imx6ul-9x9-evk.dts @@ -139,9 +139,27 @@ }; &cpu0 { - arm-supply = <®_arm>; - soc-supply = <®_soc>; - dc-supply = <®_gpio_dvfs>; + /* + * on i.MX6UL, no seperated VDD_ARM_IN and VDD_SOC_IN, + * to align with other platform and use the same cpufreq + * driver, still use the seperated OPP define for arm + * and soc. + */ + operating-points = < + /* kHz uV */ + 528000 1175000 + 396000 1175000 + 198000 1175000 + >; + fsl,soc-operating-points = < + /* KHz uV */ + 528000 1175000 + 396000 1175000 + 198000 1175000 + >; + arm-supply = <&sw1c_reg>; + soc-supply = <&sw1c_reg>; + fsl,arm-soc-shared = <1>; }; &csi { @@ -204,7 +222,7 @@ fsl,cpu_pupscr_sw = <0x0>; fsl,cpu_pdnscr_iso2sw = <0x1>; fsl,cpu_pdnscr_iso = <0x1>; - fsl,ldo-bypass = <0>; /* DCDC, ldo-enable */ + fsl,ldo-bypass = <1>; }; &i2c1 { @@ -218,14 +236,6 @@ reg = <0x08>; regulators { - sw1a_reg: sw1a { - regulator-min-microvolt = <700000>; - regulator-max-microvolt = <1475000>; - regulator-boot-on; - regulator-always-on; - regulator-ramp-delay = <6250>; - }; - /* use sw1c_reg to align with pfuze100/pfuze200 */ sw1c_reg: sw1b { regulator-min-microvolt = <700000>; |