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authorBai Ping <ping.bai@nxp.com>2017-01-20 17:41:25 +0800
committerJason Liu <jason.hui.liu@nxp.com>2019-02-12 10:25:50 +0800
commit16c57ed52563dccc13ed75e8ece03b2542676f82 (patch)
tree5630dc35371b0deb69eb313cbb3c6943ab3a6db0 /arch/arm/boot/dts/imx6ul.dtsi
parentc5a84d7689e5aad35ea5274f83e59e6d94601774 (diff)
MLK-13801-02 ARM: dts: Correct the gpt timer clock source on imx6ul/ull/sll
The GPT timer counter clock should be sourced from GPT_3M clock to avoid counter clock frequency changed due to system bus clock changes. Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ul.dtsi')
-rw-r--r--arch/arm/boot/dts/imx6ul.dtsi5
1 files changed, 3 insertions, 2 deletions
diff --git a/arch/arm/boot/dts/imx6ul.dtsi b/arch/arm/boot/dts/imx6ul.dtsi
index a16483ab9d2c..36176276cfc9 100644
--- a/arch/arm/boot/dts/imx6ul.dtsi
+++ b/arch/arm/boot/dts/imx6ul.dtsi
@@ -1,5 +1,6 @@
/*
* Copyright 2015-2016 Freescale Semiconductor, Inc.
+ * Copyright 2017 NXP.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
@@ -524,8 +525,8 @@
reg = <0x02098000 0x4000>;
interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clks IMX6UL_CLK_GPT1_BUS>,
- <&clks IMX6UL_CLK_GPT1_SERIAL>;
- clock-names = "ipg", "per";
+ <&clks IMX6UL_CLK_GPT_3M>;
+ clock-names = "ipg", "osc_per";
};
gpio1: gpio@0209c000 {