diff options
author | Philippe Schenker <philippe.schenker@toradex.com> | 2019-06-18 11:20:33 +0200 |
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committer | Philippe Schenker <philippe.schenker@toradex.com> | 2019-06-18 16:09:32 +0200 |
commit | 237dc6a1cdc22d53a59f18b48e6bfb0304794d8f (patch) | |
tree | 8359eafd149178e5f60a606d1079660606a75fd9 /arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | |
parent | 9e52cf28fb16e1ce7a49dfe651f1a585579c5678 (diff) |
ARM: dts: imx6ull-colibri: Add touchscreens used with Eval Board
Signed-off-by: Philippe Schenker <philippe.schenker@toradex.com>
Diffstat (limited to 'arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi')
-rw-r--r-- | arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi | 37 |
1 files changed, 37 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi index 1961f4b1ed87..cc92baea8250 100644 --- a/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi +++ b/arch/arm/boot/dts/imx6ull-colibri-eval-v3.dtsi @@ -111,6 +111,34 @@ &i2c1 { status = "okay"; + /* + * the PCAPs use SODIMM 28/30, also used for PWM<B>, PWM<C>, aka pwm5, + * pwm6. so if you enable one of the PCAP controllers disable the pwms + */ + atmel_mxt_ts: atmel_mxt_ts@4a { + compatible = "atmel,maxtouch"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpiotouch>; + reg = <0x4a>; + interrupt-parent = <&gpio4>; + interrupts = <16 IRQ_TYPE_EDGE_FALLING>; /* SODIMM 28 */ + reset-gpios = <&gpio2 5 GPIO_ACTIVE_HIGH>; /* SODIMM 30 */ + status = "disabled"; + }; + + touch: touchrevf0710a@10 { + compatible = "touchrevolution,fusion-f0710a"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_gpiotouch>; + reg = <0x10>; + /* SODIMM 28, Pen down interrupt */ + gpios = <&gpio4 16 GPIO_ACTIVE_HIGH + /* SODIMM 30, Reset interrupt */ + &gpio2 5 GPIO_ACTIVE_LOW + >; + status = "disabled"; + }; + /* M41T0M6 real time clock on carrier board */ m41t0m6: rtc@68 { compatible = "st,m41t0"; @@ -180,3 +208,12 @@ vmmc-supply = <®_3v3>; status = "okay"; }; + +&iomuxc { + pinctrl_gpiotouch: touchgpios { + fsl,pins = < + MX6UL_PAD_NAND_DQS__GPIO4_IO16 0x74 + MX6UL_PAD_ENET1_TX_EN__GPIO2_IO05 0x14 + >; + }; +}; |