diff options
| author | Stefan Agner <stefan.agner@toradex.com> | 2016-09-12 13:52:09 -0700 |
|---|---|---|
| committer | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-04-03 15:11:19 +0200 |
| commit | 9e959b0e22c464ff30bf7af90d40649c189baa57 (patch) | |
| tree | a785e97a372e77c9ede86250240daf8d93e47dd1 /arch/arm/boot/dts/imx7-colibri.dtsi | |
| parent | 9f754152c7afc4002f08e575bffa0868bacce1f5 (diff) | |
ARM: dts: imx7-colibri: add ENET sleep state
Add sleep state for ENET pins to avoid pull-ups back-feeding the
Ethernet rail through the PHY.
Signed-off-by: Stefan Agner <stefan.agner@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7-colibri.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx7-colibri.dtsi | 26 |
1 files changed, 15 insertions, 11 deletions
diff --git a/arch/arm/boot/dts/imx7-colibri.dtsi b/arch/arm/boot/dts/imx7-colibri.dtsi index 775a7bdaa6ee..d8ebf6977b27 100644 --- a/arch/arm/boot/dts/imx7-colibri.dtsi +++ b/arch/arm/boot/dts/imx7-colibri.dtsi @@ -409,17 +409,21 @@ pinctrl_enet1_sleep: enet1sleepgrp { fsl,pins = < - MX7D_PAD_ENET1_RGMII_RX_CTL__ENET1_RGMII_RX_CTL 0x3 - MX7D_PAD_ENET1_RGMII_RD0__ENET1_RGMII_RD0 0x3 - MX7D_PAD_ENET1_RGMII_RD1__ENET1_RGMII_RD1 0x3 - MX7D_PAD_ENET1_RGMII_RXC__ENET1_RX_ER 0x3 - - MX7D_PAD_ENET1_RGMII_TX_CTL__ENET1_RGMII_TX_CTL 0x3 - MX7D_PAD_ENET1_RGMII_TD0__ENET1_RGMII_TD0 0x3 - MX7D_PAD_ENET1_RGMII_TD1__ENET1_RGMII_TD1 0x3 - MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x3 - MX7D_PAD_SD2_CD_B__ENET1_MDIO 0x3 - MX7D_PAD_SD2_WP__ENET1_MDC 0x3 + MX7D_PAD_ENET1_RGMII_RX_CTL__GPIO7_IO4 0x0 + MX7D_PAD_ENET1_RGMII_RD0__GPIO7_IO0 0x0 + MX7D_PAD_ENET1_RGMII_RD1__GPIO7_IO1 0x0 + MX7D_PAD_ENET1_RGMII_RXC__GPIO7_IO5 0x0 + + MX7D_PAD_ENET1_RGMII_TX_CTL__GPIO7_IO10 0x0 + MX7D_PAD_ENET1_RGMII_TD0__GPIO7_IO6 0x0 + MX7D_PAD_ENET1_RGMII_TD1__GPIO7_IO7 0x0 +#ifdef USE_ENET_OUT + MX7D_PAD_GPIO1_IO12__CCM_ENET_REF_CLK1 0x0 +#else + MX7D_PAD_GPIO1_IO12__GPIO1_IO12 0x0 +#endif + MX7D_PAD_SD2_CD_B__GPIO5_IO9 0x0 + MX7D_PAD_SD2_WP__GPIO5_IO10 0x0 >; }; |