diff options
| author | Han Xu <han.xu@nxp.com> | 2017-10-12 17:15:26 -0500 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:30 +0800 |
| commit | e6d74dbe11801098eed38c0f99d2cf42d7048c70 (patch) | |
| tree | 5bf60c188a7b775dfebcbb26013b5bfebda5ab43 /arch/arm/boot/dts/imx7ulp.dtsi | |
| parent | cf52ac87da7944b271ac3bce53b3e3d7ebd86af3 (diff) | |
MLK-16571-5: arm: dts: i.MX7ULP LPSPI IPG clock change
i.MX7ULP LPSPI also use both ipg/per clock for the module, which ipg
clock was not exposed. Add one dummy clock as ipg clock to make the
lpspi code neat and clear.
Reviewed-by: Pan Gao <pandy.gao@nxp.com>
Signed-off-by: Han Xu <han.xu@nxp.com>
Diffstat (limited to 'arch/arm/boot/dts/imx7ulp.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/imx7ulp.dtsi | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/arch/arm/boot/dts/imx7ulp.dtsi b/arch/arm/boot/dts/imx7ulp.dtsi index fe6c65794a99..0730ae7ce6cd 100644 --- a/arch/arm/boot/dts/imx7ulp.dtsi +++ b/arch/arm/boot/dts/imx7ulp.dtsi @@ -298,8 +298,9 @@ compatible = "fsl,imx7ulp-spi"; reg = <0x40290000 0x10000>; interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX7ULP_CLK_LPSPI2>; - clock-names = "ipg"; + clocks = <&clks IMX7ULP_CLK_LPSPI2>, + <&clks IMX7ULP_CLK_DUMMY>; + clock-names = "per", "ipg"; assigned-clocks = <&clks IMX7ULP_CLK_LPSPI2>; assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC_BUS_CLK>; assigned-clock-rates = <48000000>; @@ -310,8 +311,9 @@ compatible = "fsl,imx7ulp-spi"; reg = <0x402A0000 0x10000>; interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; - clocks = <&clks IMX7ULP_CLK_LPSPI3>; - clock-names = "ipg"; + clocks = <&clks IMX7ULP_CLK_LPSPI3>, + <&clks IMX7ULP_CLK_DUMMY>; + clock-names = "per", "ipg"; assigned-clocks = <&clks IMX7ULP_CLK_LPSPI3>; assigned-clock-parents = <&clks IMX7ULP_CLK_FIRC_BUS_CLK>; assigned-clock-rates = <48000000>; |