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authorMurali Karicheri <m-karicheri2@ti.com>2013-11-23 16:26:06 -0500
committerSantosh Shilimkar <santosh.shilimkar@ti.com>2013-12-12 20:29:17 -0500
commitb8273f2eb5d266755a2ae2db39b2cc16f29b0941 (patch)
tree68cdfa71251d1c35b913288a9d87e1873c8c0eac /arch/arm/boot/dts/k2hk-evm.dts
parent6ce4eac1f600b34f2f7f58f9cd8f0503d79e42ae (diff)
ARM: keystone: dts: add a k2hk-evm specific dts file
This patch adds K2 Kepler/Hawking evm (k2hk-evm) specific dts file. To enable re-use of bindings across multiple evms of this family, rename current keystone.dts to keystone.dtsi and include it in the evm specific dts file. K2 SoC has separate ref clock inputs for various clocks. So add separate ref clock nodes for ARM, DDR3A, DDR3B and PA PLL input clocks in k2hk-evm.dts. While at it, rename refclkmain to refclksys based on device User Guide naming convention Signed-off-by: Murali Karicheri <m-karicheri2@ti.com> Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Diffstat (limited to 'arch/arm/boot/dts/k2hk-evm.dts')
-rw-r--r--arch/arm/boot/dts/k2hk-evm.dts55
1 files changed, 55 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/k2hk-evm.dts b/arch/arm/boot/dts/k2hk-evm.dts
new file mode 100644
index 000000000000..15b3a95f5e3a
--- /dev/null
+++ b/arch/arm/boot/dts/k2hk-evm.dts
@@ -0,0 +1,55 @@
+/*
+ * Copyright 2013 Texas Instruments, Inc.
+ *
+ * Keystone 2 Kepler/Hawking EVM device tree
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+/dts-v1/;
+
+#include "keystone.dtsi"
+
+/ {
+ compatible = "ti,keystone-evm";
+
+ soc {
+ clock {
+ refclksys: refclksys {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <122880000>;
+ clock-output-names = "refclk-sys";
+ };
+
+ refclkpass: refclkpass {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <122880000>;
+ clock-output-names = "refclk-pass";
+ };
+
+ refclkarm: refclkarm {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <125000000>;
+ clock-output-names = "refclk-arm";
+ };
+
+ refclkddr3a: refclkddr3a {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ clock-output-names = "refclk-ddr3a";
+ };
+
+ refclkddr3b: refclkddr3b {
+ #clock-cells = <0>;
+ compatible = "fixed-clock";
+ clock-frequency = <100000000>;
+ clock-output-names = "refclk-ddr3b";
+ };
+ };
+ };
+};