diff options
| author | Murali Karicheri <m-karicheri2@ti.com> | 2015-05-29 12:04:13 -0400 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2015-08-16 20:52:17 -0700 |
| commit | 40114a3e4210f30b5d16788e6e7b928868881cfd (patch) | |
| tree | 78ad670eed18c68e902d49ee4e9475a1e578adcf /arch/arm/boot/dts/k2l-clocks.dtsi | |
| parent | c6fdd1b52bb30abd861708f18509493cbb84ec44 (diff) | |
ARM: dts: keystone: fix dt bindings to use post div register for mainpll
commit c1bfa985ded82cacdfc6403e78f329c44e35534a upstream.
All of the keystone devices have a separate register to hold post
divider value for main pll clock. Currently the fixed-postdiv
value used for k2hk/l/e SoCs works by sheer luck as u-boot happens to
use a value of 2 for this. Now that we have fixed this in the pll
clock driver change the dt bindings for the same.
Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Acked-by: Santosh Shilimkar <ssantosh@kernel.org>
Signed-off-by: Olof Johansson <olof@lixom.net>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'arch/arm/boot/dts/k2l-clocks.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/k2l-clocks.dtsi | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/arch/arm/boot/dts/k2l-clocks.dtsi b/arch/arm/boot/dts/k2l-clocks.dtsi index eb1e3e29f073..ef8464bb11ff 100644 --- a/arch/arm/boot/dts/k2l-clocks.dtsi +++ b/arch/arm/boot/dts/k2l-clocks.dtsi @@ -22,9 +22,8 @@ clocks { #clock-cells = <0>; compatible = "ti,keystone,main-pll-clock"; clocks = <&refclksys>; - reg = <0x02620350 4>, <0x02310110 4>; - reg-names = "control", "multiplier"; - fixed-postdiv = <2>; + reg = <0x02620350 4>, <0x02310110 4>, <0x02310108 4>; + reg-names = "control", "multiplier", "post-divider"; }; papllclk: papllclk@2620358 { |