diff options
| author | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-10-12 11:35:16 +0200 |
|---|---|---|
| committer | Simon Horman <horms+renesas@verge.net.au> | 2017-10-16 11:43:49 +0200 |
| commit | e5042d0b97be6a831f9f204f3574d73b3f947fa5 (patch) | |
| tree | 95e3070246e08f424efb8bc4f8b3594f800e6f57 /arch/arm/boot/dts/sh73a0.dtsi | |
| parent | 5614e69269232da1f378e5be92714b96cdb090ef (diff) | |
ARM: dts: sh73a0: Add clocks for CA9 CPU cores
Improve hardware description by adding clocks properties to the device
nodes corresponding to the CA9 CPU cores.
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Diffstat (limited to 'arch/arm/boot/dts/sh73a0.dtsi')
| -rw-r--r-- | arch/arm/boot/dts/sh73a0.dtsi | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 4ea5c5a16c57..88d7e5631d34 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -27,6 +27,7 @@ compatible = "arm,cortex-a9"; reg = <0>; clock-frequency = <1196000000>; + clocks = <&cpg_clocks SH73A0_CLK_Z>; power-domains = <&pd_a2sl>; next-level-cache = <&L2>; }; @@ -35,6 +36,7 @@ compatible = "arm,cortex-a9"; reg = <1>; clock-frequency = <1196000000>; + clocks = <&cpg_clocks SH73A0_CLK_Z>; power-domains = <&pd_a2sl>; next-level-cache = <&L2>; }; |