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authorGabriel FERNANDEZ <gabriel.fernandez@st.com>2015-01-14 10:54:00 +0100
committerMaxime Coquelin <maxime.coquelin@st.com>2015-01-16 12:57:12 +0100
commitb26373c0da982f8a29406f10db39e287c1f0696b (patch)
tree118f23ad466420dd9194944ef557ef524c5cdf36 /arch/arm/boot/dts/stihxxx-b2120.dtsi
parent3fba7036c53e2c24c7505b7869dc77464fdd7d9e (diff)
ARM: DT: STi: STiH407: Add DT node for MiPHY28lp
The MiPHY28lp is a Generic PHY which can serve various SATA, PCIe or USB3 devices. The two first ports can be use for either; both SATA, both PCIe or one of each in any configuration. The Third port is only for USB3. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
Diffstat (limited to 'arch/arm/boot/dts/stihxxx-b2120.dtsi')
-rw-r--r--arch/arm/boot/dts/stihxxx-b2120.dtsi11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/stihxxx-b2120.dtsi b/arch/arm/boot/dts/stihxxx-b2120.dtsi
index 0bc8c17aa81f..c1d859092be7 100644
--- a/arch/arm/boot/dts/stihxxx-b2120.dtsi
+++ b/arch/arm/boot/dts/stihxxx-b2120.dtsi
@@ -55,5 +55,16 @@
st,i2c-min-scl-pulse-width-us = <0>;
st,i2c-min-sda-pulse-width-us = <5>;
};
+
+ miphy28lp_phy: miphy28lp@9b22000 {
+
+ phy_port0: port@9b22000 {
+ st,osc-rdy;
+ };
+
+ phy_port1: port@9b2a000 {
+ st,osc-force-ext;
+ };
+ };
};
};