diff options
author | Marcel Ziswiler <marcel.ziswiler@toradex.com> | 2017-10-03 02:05:17 +0200 |
---|---|---|
committer | Dominik Sliwa <dominik.sliwa@toradex.com> | 2017-10-03 16:35:28 +0200 |
commit | 9382b7e30394dd909ef0cbb610ccf06ef1863640 (patch) | |
tree | 96c1f5b0c28cecf3f0ad74e5167dbc3f66f45964 /arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | |
parent | 54e125a0dee6cef8f4127662d0f48be8d3b18b87 (diff) |
ARM: tegra: apalis-tk1: support v1.2 hardware revision
Support the V1.2 hardware revision with the following pin muxing
changes:
Ddc_scl_pv4 and ddc_sda_pv5 previously used as Apalis GPIO3 and GPIO4
are now used as DDC pins.
Gen2_i2c_scl_pt5 and gen2_i2c_sda_pt6 previously used as DDC pins are
now used as USB power enable signals.
Usb_vbus_en0_pn4 and usb_vbus_en1_pn5 previously used as USB power
enable signals are now used as GPIO3 and GPIO4.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Acked-by: Dominik Sliwa <dominik.sliwa@toradex.com>
Diffstat (limited to 'arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts')
-rw-r--r-- | arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts | 224 |
1 files changed, 224 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts new file mode 100644 index 000000000000..35caf0f805da --- /dev/null +++ b/arch/arm/boot/dts/tegra124-apalis-v1.2-eval.dts @@ -0,0 +1,224 @@ +/dts-v1/; + +#include "tegra124.dtsi" +#include "tegra124-platforms/tegra124-apalis-keys.dtsi" +#include "tegra124-platforms/tegra124-apalis-gpio.dtsi" +#include "tegra124-platforms/tegra124-apalis-v1.2-pinmux.dtsi" +#include "tegra124-platforms/tegra124-apalis-pmic.dtsi" +#include "tegra124-platforms/tegra124-apalis-v1.2-fixed.dtsi" + +/ { + model = "Toradex Apalis TK1 on Apalis Evaluation Board"; + compatible = "toradex,apalis-tk1-v1.2-eval", "toradex,apalis-tk1-eval", + "toradex,apalis-tk1", "nvidia,tegra124"; + nvidia,dtsfilename = __FILE__; + #address-cells = <2>; + #size-cells = <2>; + + chosen { + bootargs = "tegraid=40.0.0.00.00 vmalloc=256M video=tegrafb console=ttyS0,115200n8 earlyprintk"; + }; + + psci { + status = "disabled"; + }; + + /* TBD */ + pinmux { + pinctrl-names = "default", "drive", "unused", "suspend"; + pinctrl-3 = <&pinmux_suspend>; + + /* Change the pin dap_mclk1_req to required configurations */ + unused_lowpower { + dap_mclk1_req_pee2 { + nvidia,pins = "dap_mclk1_req_pee2"; + nvidia,function = "sata"; + nvidia,enable-input = <TEGRA_PIN_DISABLE>; + nvidia,pull = <TEGRA_PIN_PULL_NONE>; + nvidia,tristate = <TEGRA_PIN_DISABLE>; + }; + }; + + /* On suspend, make dap_mclk1_req to pull up */ + pinmux_suspend: pins_on_suspend { + dap_mclk1_req_pee2 { + nvidia,pins = "dap_mclk1_req_pee2"; + nvidia,pull = <TEGRA_PIN_PULL_UP>; + }; + }; + }; + + /* Apalis UART1 */ + serial@70006000 { + compatible = "nvidia,tegra114-uart", "nvidia,tegra20-uart"; + status = "okay"; + }; + + /* Apalis UART2 */ + serial@70006040 { + compatible = "nvidia,tegra114-hsuart"; + status = "okay"; + }; + + /* Apalis UART3 */ + serial@70006200 { + compatible = "nvidia,tegra114-hsuart"; + status = "okay"; + }; + + /* Apalis UART4 */ + serial@70006300 { + compatible = "nvidia,tegra114-hsuart"; + status = "okay"; + }; + + /* + * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier + * board) + */ + i2c@7000c000 { + status = "okay"; + clock-frequency = <400000>; + + pcie-switch@58 { + compatible = "plx,pex8605"; + reg = <0x58>; + }; + + /* M41T0M6 real time clock on carrier board */ + rtc@68 { + compatible = "st,m41t0"; + reg = <0x68>; + }; + }; + + /* PWR_I2C: power I2C to audio codec, PMIC and temperature sensor */ + i2c@7000d000 { + nvidia,bit-banging-xfer-after-shutdown; + }; + + memory@0x80000000 { + device_type = "memory"; + reg = <0x0 0x80000000 0x0 0x80000000>; + }; + + /* TBD */ + camera-pcl { + profiles { + ov4689@2_0036 { + use_of_node = "yes"; + reset-gpios = <&gpio TEGRA_GPIO(BB, 3) 0>; + cam1-gpios = <&gpio TEGRA_GPIO(BB, 5) 0>; + }; + imx185@2_001A { + use-of-node = "yes"; + cam1-gpios = <&gpio TEGRA_GPIO(BB, 5) 0>; + }; + }; + dpd { + default-enable; + }; + }; + + /* SPI1: Apalis SPI1 */ + spi@7000d400 { + status = "okay"; + spi-max-frequency = <25000000>; + + spidev0: spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <25000000>; + }; + }; + + /* SPI2: MCU SPI */ + spi@7000d600 { + status = "okay"; + spi-max-frequency = <6000000>; + + k20mcu: apalis-tk1-k20@1 { + compatible = "toradex,apalis-tk1-k20"; + reg = <1>; + spi-max-frequency = <6000000>; + interrupt-parent =<&gpio>; + interrupts = <TEGRA_GPIO(K, 2) IRQ_TYPE_EDGE_FALLING>; + rst-gpio = <&gpio TEGRA_GPIO(BB, 6) GPIO_ACTIVE_HIGH>; + + /* GPIO based CS used to enter K20 EzPort mode */ + ezport-cs-gpio = <&gpio TEGRA_GPIO(W, 2) GPIO_ACTIVE_HIGH>; + /* extra INT lines between K20 and TK1 */ + int2-gpio = <&gpio TEGRA_GPIO(J, 2) GPIO_ACTIVE_HIGH>; + int3-gpio = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_HIGH>; + int4-gpio = <&gpio TEGRA_GPIO(J, 0) GPIO_ACTIVE_HIGH>; + + toradex,apalis-tk1-k20-uses-adc; + toradex,apalis-tk1-k20-uses-can; + toradex,apalis-tk1-k20-uses-gpio; + toradex,apalis-tk1-k20-uses-tsc; + + controller-data { + nvidia,enable-hw-based-cs; + nvidia,cs-setup-clk-count = <12>; + nvidia,cs-hold-clk-count = <12>; + }; + }; + + /* + * spidev for K20 EzPort, can be used with custom firmware for + * userspace K20 applications + */ + spidev2: spidev@2 { + compatible = "spidev"; + reg = <2>; + spi-max-frequency = <2000000>; + }; + }; + + /* SPI4: Apalis SPI2 */ + spi@7000da00 { + status = "okay"; + spi-max-frequency = <25000000>; + + spidev3: spidev@0 { + compatible = "spidev"; + reg = <0>; + spi-max-frequency = <25000000>; + }; + }; + + pcie-controller { + nvidia,port0_status = <1>; + nvidia,port1_status = <1>; + hvdd_pex-supply = <®_3v3>; + avdd_pex_pll-supply = <&as3722_sd4>; + status = "okay"; + }; + + sata@0x70020000 { + nvidia,enable-sata-port; + nvidia,sata-connector-type=<STANDARD_SATA>; + vdd_sata-supply = <&as3722_sd4>; + avdd_sata_pll-supply =<&as3722_sd4>; + avdd_sata-supply = <&as3722_sd4>; + hvdd_sata-supply = <®_3v3>; + vddio_pex_sata-supply = <®_3v3>; + status = "okay"; + }; + + /* TBD */ + xusb@70090000 { + /* nvidia,uses_external_pmic; + nvidia,gpio_controls_muxed_ss_lanes; */ + nvidia,gpio_ss1_sata = <0>; + nvidia,portmap = <0x0703>; /* SSP0, SSP1 USB2P0, USB2P1, USB2P2 */ + nvidia,ss_portmap = <0x72>; /* SSP0 on USB2P2, TBD: SSP1 on USB2P0 */ + nvidia,lane_owner = <6>; /* USB3P0 USB3P1 */ + nvidia,ulpicap = <0>; /* No ulpi support. can we remove */ + /* nvidia,supply_utmi_vbuses = "usb_vbus0", "usb_vbus1", "usb_vbus2"; + nvidia,supply_s3p3v = "hvdd_usb"; + nvidia,supply_s1p8v = "avdd_pll_utmip"; + nvidia,supply_s1p05v = "avddio_usb"; */ + status = "okay"; + }; +}; |