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authorLinus Torvalds <torvalds@linux-foundation.org>2014-12-16 14:26:26 -0800
committerLinus Torvalds <torvalds@linux-foundation.org>2014-12-16 14:26:26 -0800
commit205dc205ed3ba748bab9770016bbbffb68558146 (patch)
tree100ae66d7ed97e3ecede3288797aa4e2962f2b0d /arch/arm/boot/dts/tegra30.dtsi
parent94bbdb63d7ed5ca56b788e43d0ca4a8f9494c9e7 (diff)
parent1d5f497d87c7d960c27cdc40e7563b0ae88387d3 (diff)
Merge tag 'dt2-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC DT updates part 2 from Arnd Bergmann: "This is a follow-up to the early ARM SoC DT changes, with additional content that has external dependencies: - The Tegra IOMMU DT support depends on changes from the iommu tree, plus the contents of the arm-soc drivers branch - The MVEBU PHY support depends on changes from the phy tree - The AT91 DT support depends on changes from the RTC and DMA-slave trees All of these changes just enable additional devices for existing platforms" * tag 'dt2-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: ARM: tegra: Enable IOMMU for display controllers on Tegra124 ARM: tegra: Enable IOMMU for display controllers on Tegra114 ARM: tegra: Enable IOMMU for display controllers on Tegra30 ARM: tegra: Add memory controller support for Tegra124 ARM: tegra: Add memory controller support for Tegra114 ARM: tegra: Add memory controller support for Tegra30 ARM: tegra: Add APB_MISC_GP as a MIPI pad control bank ARM: mvebu: add PHY support to the dts for the USB controllers on Armada 375 ARM: mvebu: add Device Tree description of USB cluster controller on Armada 375 ARM: at91/dt: at91sam9g45: add ISI node ARM: at91/dt: enable the RTT block on the at91sam9m10g45ek board ARM: at91/dt: enable the RTT block on the sam9g20ek board ARM: at91/dt: add GPBR nodes ARM: at91/dt: add RTT nodes to at91 dtsis ARM: at91/dt: at91sam9rl: add rtc ARM: at91: fix GPLv2 wording ARM: at91/dt: sama5d4: add DMA support ARM: at91/dt: sama5d4: use macro instead of numeric value
Diffstat (limited to 'arch/arm/boot/dts/tegra30.dtsi')
-rw-r--r--arch/arm/boot/dts/tegra30.dtsi25
1 files changed, 11 insertions, 14 deletions
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index b270b9e3d455..99475f6e76a3 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -1,5 +1,6 @@
#include <dt-bindings/clock/tegra30-car.h>
#include <dt-bindings/gpio/tegra-gpio.h>
+#include <dt-bindings/memory/tegra30-mc.h>
#include <dt-bindings/pinctrl/pinctrl-tegra.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
@@ -166,6 +167,8 @@
resets = <&tegra_car 27>;
reset-names = "dc";
+ iommus = <&mc TEGRA_SWGROUP_DC>;
+
nvidia,head = <0>;
rgb {
@@ -183,6 +186,8 @@
resets = <&tegra_car 26>;
reset-names = "dc";
+ iommus = <&mc TEGRA_SWGROUP_DCB>;
+
nvidia,head = <1>;
rgb {
@@ -615,23 +620,15 @@
clock-names = "pclk", "clk32k_in";
};
- memory-controller@7000f000 {
+ mc: memory-controller@7000f000 {
compatible = "nvidia,tegra30-mc";
- reg = <0x7000f000 0x010
- 0x7000f03c 0x1b4
- 0x7000f200 0x028
- 0x7000f284 0x17c>;
+ reg = <0x7000f000 0x400>;
+ clocks = <&tegra_car TEGRA30_CLK_MC>;
+ clock-names = "mc";
+
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
- };
- iommu@7000f010 {
- compatible = "nvidia,tegra30-smmu";
- reg = <0x7000f010 0x02c
- 0x7000f1f0 0x010
- 0x7000f228 0x05c>;
- nvidia,#asids = <4>; /* # of ASIDs */
- dma-window = <0 0x40000000>; /* IOVA start & length */
- nvidia,ahb = <&ahb>;
+ #iommu-cells = <1>;
};
fuse@7000f800 {