diff options
| author | Stefan Agner <stefan@agner.ch> | 2016-02-10 15:05:59 -0800 |
|---|---|---|
| committer | Stefan Agner <stefan@agner.ch> | 2016-02-10 18:42:27 -0800 |
| commit | 69cc6ce228c26bda7ec41aab51b1759b9d36cec6 (patch) | |
| tree | cbcb570673c5d70338e37a1aba39fce90592dec7 /arch/arm/boot/dts/vf610-twr.dts | |
| parent | 2a2ac993a772107d21a2c70fecd2032327366043 (diff) | |
ARM: dts: vf610twr: assign Ethernet clock explicitly
Assign Ethernet clock parents explicitly. The VF610 Tower Board
uses the external Ethernet clock input which is connected to
a 50MHz clock.
The Vybrid SoC has two ethernet interfaces (fec0 and fec1) which
use the same clock source (VF610_CLK_ENET). Therefore this parent
configuration affects multiple consumer devices and need to be
specified in the clock provider node.
Diffstat (limited to 'arch/arm/boot/dts/vf610-twr.dts')
| -rw-r--r-- | arch/arm/boot/dts/vf610-twr.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/vf610-twr.dts b/arch/arm/boot/dts/vf610-twr.dts index 5438ee4be2ec..8419c0607f9b 100644 --- a/arch/arm/boot/dts/vf610-twr.dts +++ b/arch/arm/boot/dts/vf610-twr.dts @@ -96,6 +96,10 @@ &clks { clocks = <&sxosc>, <&fxosc>, <&enet_ext>, <&audio_ext>; clock-names = "sxosc", "fxosc", "enet_ext", "audio_ext"; + assigned-clocks = <&clks VF610_CLK_ENET_SEL>, + <&clks VF610_CLK_ENET_TS_SEL>; + assigned-clock-parents = <&clks VF610_CLK_ENET_EXT>, + <&clks VF610_CLK_ENET_EXT>; }; &dspi0 { |