Apalis/Colibri iMX6: add intital devicetree

Signed-off-by: Max Krummenacher <max.krummenacher@toradex.com>
Acked-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
(cherry picked from commit ef68734a9798f1c7daee770128a1d5c6942c6437)

7 files changed, 2785 insertions, 0 deletions

diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
index 05825d2be57a..a9990645949d 100644
--- a/arch/arm/boot/dts/Makefile
+++ b/arch/arm/boot/dts/Makefile
@@ -256,6 +256,7 @@ dtb-$(CONFIG_SOC_IMX53) += \
 dtb-$(CONFIG_SOC_IMX6Q) += \
 	imx6dl-aristainetos_4.dtb \
 	imx6dl-aristainetos_7.dtb \
+	imx6dl-colibri-eval-v3.dtb \
 	imx6dl-cubox-i.dtb \
 	imx6dl-dfi-fs700-m60.dtb \
 	imx6dl-gw51xx.dtb \
@@ -285,6 +286,8 @@ dtb-$(CONFIG_SOC_IMX6Q) += \
 	imx6dl-sabresd-enetirq.dtb \
 	imx6dl-wandboard.dtb \
 	imx6dl-wandboard-revb1.dtb \
+	imx6q-apalis-eval.dtb \
+	imx6q-apalis-eval_v1_0.dtb \
 	imx6q-arm2.dtb \
 	imx6q-arm2-hsic.dtb \
 	imx6q-pop-arm2.dtb \
diff --git a/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
new file mode 100644
index 000000000000..65668cf16361
--- /dev/null
+++ b/arch/arm/boot/dts/imx6dl-colibri-eval-v3.dts
@@ -0,0 +1,259 @@
+/*
+ * Copyright 2014 Toradex AG
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "imx6dl.dtsi"
+#include "imx6qdl-colibri.dtsi"
+
+/ {
+	model = "Toradex Colibri iMX6DL/S on Colibri Evaluation Board V3";
+	compatible = "toradex,colibri_imx6dl-eval", "toradex,colibri_imx6dl", "fsl,imx6dl";
+
+	aliases {
+		i2c0 = &i2cddc;
+		i2c1 = &i2c2;
+		i2c2 = &i2c3;
+	};
+
+	aliases {
+		rtc0 = &rtc_i2c;
+		rtc1 = "/soc/aips-bus@02000000/snvs@020cc000/snvs-rtc-lp@34";
+	};
+
+	aliases {
+		/* the following, together with kernel patches, forces a fixed assignment
+		   between device id and usdhc controller */
+		/* i.e. the eMMC on usdhc3 will be /dev/mmcblk0 */
+		mmc0 = &usdhc3; /* eMMC */
+		mmc1 = &usdhc1; /* MMC 4bit slot */
+	};
+
+	#define KEY_WAKEUP 143
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_gpio_keys>;
+
+		wakeup {
+			label = "Wake-Up";
+			gpios = <&gpio2 22 GPIO_ACTIVE_HIGH>;
+			linux,code = <KEY_WAKEUP>;
+			debounce-interval = <10>;
+			gpio-key,wakeup;
+		};
+	};
+
+	pwmleds {
+		compatible = "pwm-leds";
+		ledpwm2 {
+			label = "PWM<B>";
+			pwms = <&pwm1 0 50000>;
+			max-brightness = <255>;
+		};
+
+		ledpwm3 {
+			label = "PWM<C>";
+			pwms = <&pwm4 0 50000>;
+			max-brightness = <255>;
+		};
+
+		ledpwm4 {
+			label = "PWM<D>";
+			pwms = <&pwm2 0 50000>;
+			max-brightness = <255>;
+		};
+	};
+
+	regulators {
+		reg_usb_host_vbus: usb_host_vbus {
+			status = "okay";
+		};
+	};
+};
+
+&backlight {
+#if 0 /* PWM polarity: if 1 is brightest */
+#if 0 /* Fusion 7 needs 10kHz PWM frequency */
+	pwms = <&pwm3 0 100000>;
+#endif
+	brightness-levels = <0 4 8 16 32 64 128 255>;
+	default-brightness-level = <6>;
+#else /* PWM plarity: if 0 is brightest */
+	brightness-levels = <0 127 191 223 239 247 251 255>;
+	default-brightness-level = <1>;
+#endif
+	status = "okay";
+};
+
+/* Colibri SPI */
+&ecspi4 {
+	status = "okay";
+
+	spidev0: spidev@1 {
+		compatible = "spidev";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&hdmi_audio {
+	status = "okay";
+};
+
+&hdmi_core {
+	status = "okay";
+};
+
+&hdmi_video {
+	status = "okay";
+};
+
+/*
+ * I2C: I2C3_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
+ * board)
+ */
+&i2c3 {
+	status = "okay";
+#if 0 /* not standard pinout, disable PWM<B>, PWM<C>
+	pcap@10 {
+		/* TouchRevolution Fusion 7 and 10 multi-touch controller */
+		compatible = "touchrevolution,fusion-f0710a";
+		reg = <0x10>;
+		gpios = <&gpio1  9 0 /* SODIMM-28, Pen down interrupt */
+			 &gpio2 10 0 /* SODIMM-30, Reset */
+			>;
+	};
+#endif
+	/* M41T0M6 real time clock on carrier board */
+	rtc_i2c: rtc@68 {
+		compatible = "st,m41t00";
+		reg = <0x68>;
+	};
+};
+
+/*
+ * DDC_I2C: I2C2_SDA/SCL on extension connector pin 15/16
+ */
+&i2cddc {
+	status = "okay";
+
+	hdmi: edid@50 {
+		compatible = "fsl,imx6-hdmi-i2c";
+		reg = <0x50>;
+	};
+};
+
+&iomuxc {
+	/*
+	 * Mux all pins which are unused to be GPIOs
+	 * so they are ready for export to user space
+	 */
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_weim_gpio_1 &pinctrl_weim_gpio_2
+	             &pinctrl_weim_gpio_3 &pinctrl_weim_gpio_4
+	             &pinctrl_weim_gpio_5
+	             &pinctrl_csi_gpio_1
+	             &pinctrl_gpio_1
+	             &pinctrl_usbh_oc_1 &pinctrl_usbc_id_1
+	             &pinctrl_usbc_det_1>;
+};
+
+&lcd {
+	status = "okay";
+};
+
+&mxcfb1 {
+	status = "okay";
+};
+
+&mxcfb2 {
+	status = "okay";
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+&pwm3 {
+	status = "okay";
+};
+
+&pwm4 {
+	status = "okay";
+};
+
+&sound_hdmi {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+#if 0
+	linux,rs485-enabled-at-boot-time;
+#endif
+};
+
+&uart3 {
+	status = "okay";
+};
+
+&usbh1 {
+	status = "okay";
+};
+
+&usbotg {
+	status = "okay";
+};
+
+/* MMC */
+&usdhc1 {
+	status = "okay";
+};
+
+&weim {
+	status = "okay";
+	/* weim memory map: 32MB on CS0, 32MB on CS1, 32MB on CS2 */
+	ranges = <0 0 0x08000000 0x02000000
+	          1 0 0x0a000000 0x02000000
+	          2 0 0x0c000000 0x02000000>;
+	/* SRAM on CS0 */
+	sram@0,0 {
+		compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram";
+		reg = <0 0 0x00010000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		bank-width = <2>;
+		fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
+				0x00000000 0x04000040 0x00000000>;
+	};
+	/* SRAM on CS1 */
+	sram@1,0 {
+		compatible = "cypress,cy7c1019dv33-10zsxi, mtd-ram";
+		reg = <1 0 0x00010000>;
+		#address-cells = <1>;
+		#size-cells = <1>;
+		bank-width = <2>;
+		fsl,weim-cs-timing = <0x00010081 0x00000000 0x04000000
+				0x00000000 0x04000040 0x00000000>;
+	};
+};
diff --git a/arch/arm/boot/dts/imx6q-apalis-eval.dts b/arch/arm/boot/dts/imx6q-apalis-eval.dts
new file mode 100644
index 000000000000..1e819a6f4509
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-apalis-eval.dts
@@ -0,0 +1,25 @@
+/*
+ * Copyright 2014 Toradex AG
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "imx6q.dtsi"
+#include "imx6qdl-apalis.dtsi"
+#include "imx6qdl-apalis-eval.dtsi"
+
+/ {
+	model = "Toradex Apalis iMX6Q on Apalis Evaluation Board";
+	compatible = "toradex,apalis_imx6q-eval", "toradex,apalis_imx6q", "fsl,imx6q";
+};
diff --git a/arch/arm/boot/dts/imx6q-apalis-eval_v1_0.dts b/arch/arm/boot/dts/imx6q-apalis-eval_v1_0.dts
new file mode 100644
index 000000000000..277b8847f837
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-apalis-eval_v1_0.dts
@@ -0,0 +1,29 @@
+/*
+ * Copyright 2014 Toradex AG
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/dts-v1/;
+
+
+#include <dt-bindings/interrupt-controller/irq.h>
+#include "imx6q.dtsi"
+/* on HW V1.0 all RxD/TxD lines are routed in a DCE way, all control lines (RTS/...)
+   are then not routed as given in the module specification and thus unusable.
+   The following define configures the UARTs to RxD/TxD correctly */
+#define USE_UART_IN_DCE_MODE
+#include "imx6qdl-apalis.dtsi"
+#include "imx6qdl-apalis-eval.dtsi"
+
+/ {
+	model = "Toradex Apalis iMX6Q on Apalis Evaluation Board";
+	compatible = "toradex,apalis_imx6q-eval", "toradex,apalis_imx6q", "fsl,imx6q";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-apalis-eval.dtsi b/arch/arm/boot/dts/imx6qdl-apalis-eval.dtsi
new file mode 100644
index 000000000000..bd7c66141207
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-apalis-eval.dtsi
@@ -0,0 +1,350 @@
+/*
+ * Copyright 2014 Toradex AG
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+
+/ {
+	aliases {
+		i2c0 = &i2cddc;
+		i2c1 = &i2c1;
+		i2c2 = &i2c2;
+		i2c3 = &i2c3;
+	};
+
+	aliases {
+		/* the following, together with kernel patches, forces a fixed assignment
+		   between device id and usdhc controller */
+		/* i.e. the eMMC on usdhc3 will be /dev/mmcblk0 */
+		mmc0 = &usdhc3; /* eMMC */
+		mmc1 = &usdhc1; /* MMC1 8bit slot */
+		mmc2 = &usdhc2; /* SD1  4bit slot */
+	};
+
+	aliases {
+		rtc0 = &rtc_i2c;
+		rtc1 = "/soc/aips-bus@02000000/snvs@020cc000/snvs-rtc-lp@34";
+	};
+
+	#define KEY_WAKEUP 143
+	gpio-keys {
+		compatible = "gpio-keys";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_gpio_keys>;
+
+		wakeup {
+			label = "Wake-Up";
+			gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
+			linux,code = <KEY_WAKEUP>;
+			debounce-interval = <10>;
+			gpio-key,wakeup;
+		};
+	};
+
+	pwmleds {
+		compatible = "pwm-leds";
+		ledpwm1 {
+			label = "PWM1";
+			pwms = <&pwm1 0 50000>;
+			max-brightness = <255>;
+		};
+
+		ledpwm2 {
+			label = "PWM2";
+			pwms = <&pwm2 0 50000>;
+			max-brightness = <255>;
+		};
+
+		ledpwm3 {
+			label = "PWM3";
+			pwms = <&pwm3 0 50000>;
+			max-brightness = <255>;
+		};
+	};
+
+	regulators {
+		reg_usb_otg_vbus: usb_otg_vbus {
+			status = "okay";
+		};
+
+		reg_usb_host_vbus: usb_host_vbus {
+			status = "okay";
+		};
+	};
+};
+
+&backlight {
+#if 0 /* PWM polarity: if 1 is brightest */
+#if 0 /* Fusion 7 needs 10kHz PWM frequency */
+	pwms = <&pwm4 0 100000>;
+#endif
+	brightness-levels = <0 4 8 16 32 64 128 255>;
+	default-brightness-level = <6>;
+#else /* PWM plarity: if 0 is brightest */
+	brightness-levels = <0 127 191 223 239 247 251 255>;
+	default-brightness-level = <1>;
+#endif
+	status = "okay";
+};
+
+/* Apalis SPI1 */
+&ecspi1 {
+	status = "okay";
+
+	spidev0: spidev@1 {
+		compatible = "spidev";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+/* Apalis SPI2 */
+&ecspi2 {
+	status = "okay";
+
+	spidev1: spidev@2 {
+		compatible = "spidev";
+		reg = <0>;
+		spi-max-frequency = <50000000>;
+	};
+};
+
+&flexcan1 {
+	status = "okay";
+};
+
+&flexcan2 {
+	status = "okay";
+};
+
+&hdmi_audio {
+	status = "okay";
+};
+
+&hdmi_cec {
+	status = "okay";
+};
+
+&hdmi_core {
+	status = "okay";
+};
+
+&hdmi_video {
+	status = "okay";
+};
+
+/*
+ * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
+ * board)
+ */
+&i2c1 {
+	status = "okay";
+
+	pcap@10 {
+		/* TouchRevolution Fusion 7 and 10 multi-touch controller */
+		compatible = "touchrevolution,fusion-f0710a";
+		reg = <0x10>;
+		gpios = <&gpio6 10 0 /* MXM-11, Pen down interrupt */
+			 &gpio6  9 0 /* MXM-13, Reset */
+			>;
+	};
+
+	pcie-switch@58 {
+		compatible = "plx,pex8605";
+		reg = <0x58>;
+	};
+
+	/* M41T0M6 real time clock on carrier board */
+	rtc_i2c: rtc@68 {
+		compatible = "st,m41t00";
+		reg = <0x68>;
+	};
+};
+
+/*
+ * GEN2_I2C, CAM: I2C3_SDA/SCL on MXM3 pin 201/203 (unused)
+ */
+&i2c3 {
+	status = "okay";
+
+	/* Video ADC on Analog Camera Module */
+	adv7180: adv7180@21 {
+		compatible = "adv,adv7180";
+		reg = <0x21>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>;
+		clocks = <&clks 200>;
+		clock-names = "csi_mclk";
+		DOVDD-supply = <&reg_3p3v>; /* 3.3v */
+		AVDD-supply = <&reg_3p3v>;  /* 1.8v */
+		DVDD-supply = <&reg_3p3v>;  /* 1.8v */
+		PVDD-supply = <&reg_3p3v>;  /* 1.8v */
+		csi_id = <0>;
+		mclk = <24000000>;
+		mclk_source = <1>;
+		cvbs = <1>;
+	};
+
+	max9526: max9526@20 {
+		compatible = "maxim,max9526";
+		reg = <0x20>;
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ipu1_csi0 &pinctrl_cam_mclk>;
+		clocks = <&clks 200>;
+		clock-names = "csi_mclk";
+		DVDDIO-supply = <&reg_3p3v>; /* 3.3v */
+		AVDD-supply = <&reg_3p3v>;  /* 1.8v */
+		DVDD-supply = <&reg_3p3v>;  /* 1.8v */
+		csi_id = <0>;
+		mclk = <24000000>;
+		mclk_source = <1>;
+		cvbs = <1>;
+	};
+
+	ov5640_mipi@3c {
+		compatible = "ovti,ov5640_mipi";
+		reg = <0x3c>;
+		clocks = <&clks 147>;
+		clock-names = "csi_mclk";
+		DOVDD-supply = <&reg_1p8v>;
+		AVDD-supply = <&reg_2p5v>;
+		DVDD-supply = <&reg_1p8v>;
+		pwn-gpios = <&gpio6 9 1>;
+		rst-gpios = <&gpio2 5 0>;
+		ipu_id = <0>;
+		csi_id = <1>;
+		mclk = <22000000>;
+		mclk_source = <0>;
+		pwms = <&pwm3 0 45>;
+	};
+};
+
+/*
+ * DDC_I2C: I2C2_SDA/SCL on MXM3 pin 205/207
+ */
+&i2cddc {
+	status = "okay";
+
+	hdmi: edid@50 {
+		compatible = "fsl,imx6-hdmi-i2c";
+		reg = <0x50>;
+	};
+};
+
+&iomuxc {
+	/*
+	 * Mux the Apalis GPIOs, GPIO7 used for PCIe reset,
+	 * GPIO5, 6 used by optional fusion_F0710A kernel module
+	 */
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_apalis_gpio1 &pinctrl_apalis_gpio2
+		     &pinctrl_apalis_gpio3 &pinctrl_apalis_gpio4
+		     &pinctrl_apalis_gpio5 &pinctrl_apalis_gpio6
+		     &pinctrl_apalis_gpio7 &pinctrl_apalis_gpio8>;
+};
+
+&lcd {
+	status = "okay";
+};
+
+&mxcfb1 {
+	status = "okay";
+};
+
+&mxcfb2 {
+	status = "okay";
+};
+
+&mxcfb3 {
+	status = "okay";
+};
+
+&mxcfb4 {
+	status = "okay";
+};
+
+&pcie {
+	reset-gpio = <&gpio1 2 0>;
+	reset-ep-gpio = <&gpio1 28 0>;
+	status = "okay";
+};
+
+&pwm1 {
+	status = "okay";
+};
+
+&pwm2 {
+	status = "okay";
+};
+
+&pwm3 {
+	status = "okay";
+};
+
+&pwm4 {
+	status = "okay";
+};
+
+&sata {
+	status = "okay";
+};
+
+&sound_hdmi {
+	status = "okay";
+};
+
+&sound_spdif {
+	status = "okay";
+};
+
+&spdif {
+	status = "okay";
+};
+
+&uart1 {
+	status = "okay";
+};
+
+&uart2 {
+	status = "okay";
+#if 0
+	linux,rs485-enabled-at-boot-time;
+#endif
+};
+
+&uart4 {
+	status = "okay";
+};
+
+&uart5 {
+	status = "okay";
+};
+
+&usbh1 {
+	status = "okay";
+};
+
+&usbotg {
+	status = "okay";
+};
+
+/* MMC1 */
+&usdhc1 {
+	status = "okay";
+};
+
+/* SD1 */
+&usdhc2 {
+	status = "okay";
+};
+
+&vdac {
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-apalis.dtsi b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
new file mode 100644
index 000000000000..8e84c0f69b72
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-apalis.dtsi
@@ -0,0 +1,1134 @@
+/*
+ * Copyright 2014 Toradex AG
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+//#include <include/dt-bindings/input/input.h>
+
+/ {
+	model = "Toradex Apalis iMX6Q  Module";
+	compatible = "toradex,apalis_imx6q", "fsl,imx6q";
+
+	aliases {
+		mxcfb0 = &mxcfb1;
+		mxcfb1 = &mxcfb2;
+		mxcfb2 = &mxcfb3;
+		mxcfb3 = &mxcfb4;
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm4 0 5000000>;
+		status = "disabled";
+	};
+
+	clocks {
+		clk24m: clk24m {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <24000000>;
+		};
+	};
+
+/*
+ * DDC_I2C: I2C2_SDA/SCL on MXM3 pin 205/207
+ */
+	i2cddc: i2c@0 {
+		compatible = "i2c-gpio";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2c_ddc>;
+		gpios = <&gpio3 16 0 /* sda */
+			 &gpio2 30 0 /* scl */
+			>;
+		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+	};
+
+	lcd: lcd@0 {
+		compatible = "fsl,lcd";
+		ipu_id = <0>;
+		disp_id = <1>;
+		default_ifmt = "RGB24";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ipu1_lcdif>;
+		status = "disabled";
+	};
+
+	memory {
+		/* This node is rewritten by U-Boot with the actual memory size */
+		reg = <0x10000000 0x80000000>;
+	};
+
+#if 0
+	mxcfb1: fb@0 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "mipi_dsi";
+		interface_pix_fmt = "RGB666";
+		mode_str ="LDB-XGA";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+#else
+	mxcfb1: fb@0 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "ldb";
+		interface_pix_fmt = "LVDS666";
+		mode_str ="LDB-XGA";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+#endif
+	};
+
+	mxcfb2: fb@1 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "hdmi";
+		interface_pix_fmt = "RGB24";
+		mode_str ="1920x1080M@60";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	mxcfb3: fb@2 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "lcd";
+		interface_pix_fmt = "RGB565";
+		mode_str ="CLAA-WVGA";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+#if 0
+	mxcfb4: fb@3 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "ldb";
+		interface_pix_fmt = "RGB666";
+		mode_str ="LDB-XGA";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+#else
+	mxcfb4: fb@3 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "vdac";
+		interface_pix_fmt = "RGB565";
+		mode_str ="LDB-XGA";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+#endif
+
+	regulators {
+		compatible = "simple-bus";
+
+		reg_1p8v: 1p8v {
+			compatible = "regulator-fixed";
+			regulator-name = "1P8V";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+		};
+
+		reg_2p5v: 2p5v {
+			compatible = "regulator-fixed";
+			regulator-name = "2P5V";
+			regulator-min-microvolt = <2500000>;
+			regulator-max-microvolt = <2500000>;
+			regulator-always-on;
+		};
+
+		reg_3p3v: 3p3v {
+			compatible = "regulator-fixed";
+			regulator-name = "3P3V";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		reg_usb_otg_vbus: usb_otg_vbus {
+			compatible = "regulator-fixed";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_regulator_usbotg_pwr>;
+			regulator-name = "usb_otg_vbus";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio3 22 0>;
+			enable-active-high;
+			status = "disabled";
+		};
+
+		/* on module usb hub */
+		reg_usb_host_vbus_hub: usb_host_vbus_hub {
+			compatible = "regulator-fixed";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_regulator_usbhub_pwr>;
+			regulator-name = "usb_host_vbus_hub";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio = <&gpio3 28 0>;
+			startup-delay-us = <2000>;
+			enable-active-high;
+			status = "okay";
+		};
+
+		reg_usb_host_vbus: usb_host_vbus {
+			compatible = "regulator-fixed";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
+			regulator-name = "usb_host_vbus";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio =  <&gpio1 0 0>;
+			enable-active-high;
+			vin-supply = <&reg_usb_host_vbus_hub>;
+			status = "disabled";
+		};
+	};
+
+	sound {
+		compatible = "fsl,imx6q-apalis-sgtl5000",
+			     "fsl,imx-audio-sgtl5000";
+		model = "imx6q-apalis-sgtl5000";
+		cpu-dai = <&ssi1>;
+		audio-codec = <&codec>;
+		audio-routing =
+			"MIC_IN", "Mic Jack",
+			"Mic Jack", "Mic Bias",
+			"Headphone Jack", "HP_OUT";
+		mux-int-port = <1>;
+		mux-ext-port = <4>;
+	};
+
+	sound_hdmi: sound-hdmi {
+		compatible = "fsl,imx6q-audio-hdmi",
+			     "fsl,imx-audio-hdmi";
+		model = "imx-audio-hdmi";
+		hdmi-controller = <&hdmi_audio>;
+		status = "disabled";
+	};
+
+	sound_spdif: sound-spdif {
+		compatible = "fsl,imx-audio-spdif";
+		model = "imx-spdif";
+		spdif-controller = <&spdif>;
+		spdif-out;
+		spdif-in;
+		status = "disabled";
+	};
+
+	vdac: vdac@0 {
+		compatible = "fsl,vdac";
+		ipu_id = <1>;
+		disp_id = <0>;
+		default_ifmt = "RGB565";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ipu2_vdac>;
+		status = "disabled";
+	};
+
+	v4l2_out {
+		compatible = "fsl,mxc_v4l2_output";
+		status = "okay";
+	};
+};
+
+&audmux {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_audmux &pinctrl_audmux_mclk>;
+	status = "okay";
+};
+
+/* Apalis SPI1 */
+&ecspi1 {
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio5 25 0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi1 &pinctrl_spi_cs1>;
+	status = "disabled";
+};
+
+/* Apalis SPI2 */
+&ecspi2 {
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio2 26 0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi2 &pinctrl_spi_cs2>;
+	status = "disabled";
+};
+
+&fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet &pinctrl_enet_ctrl>;
+	phy-mode = "rgmii";
+	/*phy-reset-gpios = <&gpio1 25 0>;*/
+	status = "okay";
+
+	#address-cells = <0>;
+	#size-cells = <1>;
+	phy_int {
+		reg = <0x6>;
+		interrupt-parent = <&gpio1>;
+		interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
+	};
+};
+
+&flexcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan1>;
+	status = "disabled";
+};
+
+&flexcan2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan2>;
+	status = "disabled";
+};
+
+&hdmi_audio {
+	status = "okay";
+};
+
+&hdmi_cec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_hdmi_cec>;
+	status = "disabled";
+};
+
+&hdmi_core {
+	ipu_id = <0>;
+	disp_id = <0>;
+	status = "disabled";
+};
+
+&hdmi_video {
+	fsl,phy_reg_vlev = <0x0294>;
+	fsl,phy_reg_cksymtx = <0x800d>;
+	status = "disabled";
+};
+
+/*
+ * GEN1_I2C: I2C1_SDA/SCL on MXM3 pin 209/211 (e.g. RTC on carrier
+ * board)
+ */
+&i2c1 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c1>;
+	status = "disabled";
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+
+	pmic: pfuze100@08 {
+		compatible = "fsl,pfuze100";
+		reg = <0x08>;
+
+		regulators {
+			sw1a_reg: sw1ab {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw1c_reg: sw1c {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw3a_reg: sw3a {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			swbst_reg: swbst {
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5150000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			snvs_reg: vsnvs {
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vref_reg: vrefddr {
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen1_reg: vgen1 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen2_reg: vgen2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen3_reg: vgen3 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen4_reg: vgen4 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen5_reg: vgen5 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen6_reg: vgen6 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
+
+	codec: sgtl5000@0a {
+		compatible = "fsl,sgtl5000";
+		reg = <0x0a>;
+		clocks = <&clks 201>;
+		VDDA-supply = <&reg_2p5v>;
+		VDDIO-supply = <&reg_3p3v>;
+	};
+
+	/* STMPE811 touch screen controller */
+	stmpe811@41 {
+		compatible = "st,stmpe811";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_touch_int>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x41>;
+		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-parent = <&gpio4>;
+		interrupt-controller;
+		id = <0>;
+		blocks = <0x5>;
+		irq-trigger = <0x1>;
+		stmpe_touchscreen {
+			compatible = "st,stmpe-ts";
+			reg = <0>;
+			/* 3.25 MHz ADC clock speed */
+			st,adc-freq = <1>;
+			/* 8 sample average control */
+			st,ave-ctrl = <3>;
+			/* 7 length fractional part in z */
+			st,fraction-z = <7>;
+			/*
+			 * 50 mA typical 80 mA max touchscreen drivers
+			 * current limit value
+			 */
+			st,i-drive = <1>;
+			/* 12-bit ADC */
+			st,mod-12b = <1>;
+			/* internal ADC reference */
+			st,ref-sel = <0>;
+			/* ADC converstion time: 80 clocks */
+			st,sample-time = <4>;
+			/* 1 ms panel driver settling time */
+			st,settling = <3>;
+			/* 5 ms touch detect interrupt delay */
+			st,touch-det-delay = <5>;
+		};
+		stmpe_adc {
+			compatible = "st,stmpe-adc";
+			/* 3.25 MHz ADC clock speed */
+			st,adc-freq = <1>;
+			/* 12-bit ADC */
+			st,mod-12b = <1>;
+			/* internal ADC reference */
+			st,ref-sel = <0>;
+			/* ADC converstion time: 80 clocks */
+			st,sample-time = <4>;
+		};
+	};
+};
+
+/*
+ * GEN2_I2C, CAM: I2C3_SDA/SCL on MXM3 pin 201/203 (unused)
+ */
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default", "recovery";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	pinctrl-1 = <&pinctrl_i2c3_recovery>;
+	gpios = <&gpio3 18 0 /* sda */
+	         &gpio3 17 0 /* scl */
+	        >;
+	status = "disabled";
+};
+
+/* PAD Ctrl Values for Common Settings */
+#define PAD_CTRL_HYS_PU 0x1b0b0 /*(PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)*/
+#define PAD_CTRL_HYS_PD 0x130b0 /*(PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)*/
+#define PAD_CTRL_PU_22k 0x0f058 /*(PAD_CTL_PUS_22K_UP | PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm)*/
+#define PAD_CTRL_NO 0x80000000
+
+&iomuxc {
+	ecspi {
+		pinctrl_ecspi1: ecspi1grp {
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT6__ECSPI1_MISO 0x100b1
+				MX6QDL_PAD_CSI0_DAT5__ECSPI1_MOSI 0x100b1
+				MX6QDL_PAD_CSI0_DAT4__ECSPI1_SCLK 0x100b1
+			>;
+		};
+		pinctrl_ecspi2: ecspi2grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_OE__ECSPI2_MISO 0x100b1
+				MX6QDL_PAD_EIM_CS1__ECSPI2_MOSI 0x100b1
+				MX6QDL_PAD_EIM_CS0__ECSPI2_SCLK 0x100b1
+			>;
+		};
+		pinctrl_spi_cs1: spi_cs1 {
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT7__GPIO5_IO25	PAD_CTRL_NO	/* SPI1 cs */
+				>;
+		};
+		pinctrl_spi_cs2: spi_cs2 {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_RW__GPIO2_IO26		PAD_CTRL_NO	/* SPI2 cs */
+				>;
+		};
+	};
+
+	flexcan {
+		pinctrl_flexcan1: flexcan1grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_7__FLEXCAN1_TX   0x80000000
+				MX6QDL_PAD_GPIO_8__FLEXCAN1_RX   0x80000000
+			>;
+		};
+		pinctrl_flexcan2: flexcan2grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000
+				MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000
+			>;
+		};
+	};
+
+	gpio {
+		pinctrl_apalis_gpio1: apalis_gpio1 {
+			fsl,pins = <
+				/* Apalis GPIO */
+				MX6QDL_PAD_NANDF_D4__GPIO2_IO04		PAD_CTRL_HYS_PD	/* Apalis GPIO1 */
+			>;
+		};
+		pinctrl_apalis_gpio2: apalis_gpio2 {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_D5__GPIO2_IO05		PAD_CTRL_HYS_PD	/* Apalis GPIO2 */
+			>;
+		};
+		pinctrl_apalis_gpio3: apalis_gpio3 {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_D6__GPIO2_IO06		PAD_CTRL_HYS_PD	/* Apalis GPIO3 */
+			>;
+		};
+		pinctrl_apalis_gpio4: apalis_gpio4 {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_D7__GPIO2_IO07		PAD_CTRL_HYS_PD	/* Apalis GPIO4 */
+			>;
+		};
+		pinctrl_apalis_gpio5: apalis_gpio5 {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_RB0__GPIO6_IO10	PAD_CTRL_HYS_PD	/* Apalis GPIO5 */
+			>;
+		};
+		pinctrl_apalis_gpio6: apalis_gpio6 {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09	PAD_CTRL_HYS_PD	/* Apalis GPIO6 */
+			>;
+		};
+		pinctrl_apalis_gpio7: apalis_gpio7 {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_2__GPIO1_IO02		PAD_CTRL_HYS_PD	/* Apalis GPIO7 */
+			>;
+		};
+		pinctrl_apalis_gpio8: apalis_gpio8 {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_6__GPIO1_IO06		PAD_CTRL_HYS_PD	/* Apalis GPIO8 */
+			>;
+		};
+		pinctrl_gpio_keys: gpio_keys {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_4__GPIO1_IO04		PAD_CTRL_HYS_PU	/* Power Button */
+				>;
+		};
+	};
+
+	hdmi {
+		pinctrl_hdmi_cec: hdmicecgrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_ROW2__HDMI_TX_CEC_LINE 0x1f8b0
+			>;
+		};
+	};
+
+	i2c {
+		pinctrl_i2c_ddc: i2c_ddc {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_EB2__GPIO2_IO30		PAD_CTRL_HYS_PU	/* DDC bitbang */
+				MX6QDL_PAD_EIM_D16__GPIO3_IO16		PAD_CTRL_HYS_PU	/* DDC bitbang */
+				>;
+		};
+		pinctrl_i2c1: i2c1grp {
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
+				MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
+			>;
+		};
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D17__I2C3_SCL 0x4001b8b1
+				MX6QDL_PAD_EIM_D18__I2C3_SDA 0x4001b8b1
+			>;
+		};
+		pinctrl_i2c3_recovery: i2c3-recoverygrp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x4001b8b1
+				MX6QDL_PAD_EIM_D18__GPIO3_IO18 0x4001b8b1
+			>;
+		};
+	};
+
+	/* pins used on module */
+	imx6q-apalis {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_reset_moci &pinctrl_emmc_reset>;
+		pinctrl_audmux: audmuxgrp {
+			fsl,pins = <
+				MX6QDL_PAD_DISP0_DAT20__AUD4_TXC  0x130b0
+				MX6QDL_PAD_DISP0_DAT21__AUD4_TXD  0x130b0
+				MX6QDL_PAD_DISP0_DAT22__AUD4_TXFS 0x130b0
+				MX6QDL_PAD_DISP0_DAT23__AUD4_RXD  0x130b0
+			>;
+		};
+		pinctrl_audmux_mclk: audmux_mclk {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_5__CCM_CLKO1		0x000b0		/* SGTL5000 sys_mclk */
+			>;
+		};
+		pinctrl_emmc_reset: emmc_reset {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_RST__GPIO7_IO08		PAD_CTRL_PU_22k	/* eMMC reset, leave it alone */
+			>;
+		};
+		pinctrl_enet: enetgrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_MDIO__ENET_MDIO       0x1b0b0
+				MX6QDL_PAD_ENET_MDC__ENET_MDC         0x1b0b0
+				MX6QDL_PAD_RGMII_TXC__RGMII_TXC       0x1b0b0
+				MX6QDL_PAD_RGMII_TD0__RGMII_TD0       0x1b0b0
+				MX6QDL_PAD_RGMII_TD1__RGMII_TD1       0x1b0b0
+				MX6QDL_PAD_RGMII_TD2__RGMII_TD2       0x1b0b0
+				MX6QDL_PAD_RGMII_TD3__RGMII_TD3       0x1b0b0
+				MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
+				MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK  0x1b0b0
+				MX6QDL_PAD_RGMII_RXC__RGMII_RXC       0x1b0b0
+				MX6QDL_PAD_RGMII_RD0__RGMII_RD0       0x1b0b0
+				MX6QDL_PAD_RGMII_RD1__RGMII_RD1       0x1b0b0
+				MX6QDL_PAD_RGMII_RD2__RGMII_RD2       0x1b0b0
+				MX6QDL_PAD_RGMII_RD3__RGMII_RD3       0x1b0b0
+				MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
+			>;
+		};
+		pinctrl_enet_ctrl: enet_ctrlgrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_CRS_DV__GPIO1_IO25	PAD_CTRL_NO	/* ENET phy reset */
+				MX6QDL_PAD_ENET_TXD0__GPIO1_IO30	PAD_CTRL_HYS_PU	/* ENET phy interrupt */
+			>;
+		};
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
+				MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
+			>;
+		};
+		pinctrl_ipu2_vdac: ipu2vdacgrp {
+			fsl,pins = <
+				MX6QDL_PAD_DI0_DISP_CLK__IPU2_DI0_DISP_CLK 0xD1
+				MX6QDL_PAD_DI0_PIN15__IPU2_DI0_PIN15       0xD1
+				MX6QDL_PAD_DI0_PIN2__IPU2_DI0_PIN02        0xD1
+				MX6QDL_PAD_DI0_PIN3__IPU2_DI0_PIN03        0xD1
+				MX6QDL_PAD_DISP0_DAT0__IPU2_DISP0_DATA00   0xF9
+				MX6QDL_PAD_DISP0_DAT1__IPU2_DISP0_DATA01   0xF9
+				MX6QDL_PAD_DISP0_DAT2__IPU2_DISP0_DATA02   0xF9
+				MX6QDL_PAD_DISP0_DAT3__IPU2_DISP0_DATA03   0xF9
+				MX6QDL_PAD_DISP0_DAT4__IPU2_DISP0_DATA04   0xF9
+				MX6QDL_PAD_DISP0_DAT5__IPU2_DISP0_DATA05   0xF9
+				MX6QDL_PAD_DISP0_DAT6__IPU2_DISP0_DATA06   0xF9
+				MX6QDL_PAD_DISP0_DAT7__IPU2_DISP0_DATA07   0xF9
+				MX6QDL_PAD_DISP0_DAT8__IPU2_DISP0_DATA08   0xF9
+				MX6QDL_PAD_DISP0_DAT9__IPU2_DISP0_DATA09   0xF9
+				MX6QDL_PAD_DISP0_DAT10__IPU2_DISP0_DATA10  0xF9
+				MX6QDL_PAD_DISP0_DAT11__IPU2_DISP0_DATA11  0xF9
+				MX6QDL_PAD_DISP0_DAT12__IPU2_DISP0_DATA12  0xF9
+				MX6QDL_PAD_DISP0_DAT13__IPU2_DISP0_DATA13  0xF9
+				MX6QDL_PAD_DISP0_DAT14__IPU2_DISP0_DATA14  0xF9
+				MX6QDL_PAD_DISP0_DAT15__IPU2_DISP0_DATA15  0xF9
+			>;
+		};
+		pinctrl_regulator_usbhub_pwr: gpio_regulator_usbhub_pwr {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D28__GPIO3_IO28		PAD_CTRL_PU_22k	/* USBH_HUB_EN */
+				>;
+		};
+		pinctrl_reset_moci: gpio_reset_moci {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_TX_EN__GPIO1_IO28	PAD_CTRL_PU_22k	/* RESET_MOCI control */
+				>;
+		};
+		pinctrl_touch_int: touch_intgrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL2__GPIO4_IO10		PAD_CTRL_HYS_PU /* STMPE811 interrupt */
+			>;
+		};
+		pinctrl_usdhc3: usdhc3grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
+				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
+			>;
+		};
+		pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /* 100Mhz */
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9
+				MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170B9
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170B9
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170B9
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170B9
+			>;
+		};
+		pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /* 200Mhz */
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+				MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170F9
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170F9
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170F9
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170F9
+			>;
+		};
+	};
+
+	ipu1 {
+		pinctrl_ipu1_lcdif: ipu1lcdifgrp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_A16__IPU1_DI1_DISP_CLK	0x61
+				MX6QDL_PAD_EIM_DA10__IPU1_DI1_PIN15	0x61                /* DE */
+				MX6QDL_PAD_EIM_DA11__IPU1_DI1_PIN02	0x61                /* HSync */
+				MX6QDL_PAD_EIM_DA12__IPU1_DI1_PIN03	0x61                /* VSync */
+				MX6QDL_PAD_EIM_DA9__IPU1_DISP1_DATA00	0x61
+				MX6QDL_PAD_EIM_DA8__IPU1_DISP1_DATA01	0x61
+				MX6QDL_PAD_EIM_DA7__IPU1_DISP1_DATA02	0x61
+				MX6QDL_PAD_EIM_DA6__IPU1_DISP1_DATA03	0x61
+				MX6QDL_PAD_EIM_DA5__IPU1_DISP1_DATA04	0x61
+				MX6QDL_PAD_EIM_DA4__IPU1_DISP1_DATA05	0x61
+				MX6QDL_PAD_EIM_DA3__IPU1_DISP1_DATA06	0x61
+				MX6QDL_PAD_EIM_DA2__IPU1_DISP1_DATA07	0x61
+				MX6QDL_PAD_EIM_DA1__IPU1_DISP1_DATA08	0x61
+				MX6QDL_PAD_EIM_DA0__IPU1_DISP1_DATA09	0x61
+				MX6QDL_PAD_EIM_EB1__IPU1_DISP1_DATA10	0x61
+				MX6QDL_PAD_EIM_EB0__IPU1_DISP1_DATA11	0x61
+				MX6QDL_PAD_EIM_A17__IPU1_DISP1_DATA12	0x61
+				MX6QDL_PAD_EIM_A18__IPU1_DISP1_DATA13	0x61
+				MX6QDL_PAD_EIM_A19__IPU1_DISP1_DATA14	0x61
+				MX6QDL_PAD_EIM_A20__IPU1_DISP1_DATA15	0x61
+				MX6QDL_PAD_EIM_A21__IPU1_DISP1_DATA16	0x61
+				MX6QDL_PAD_EIM_A22__IPU1_DISP1_DATA17	0x61
+				MX6QDL_PAD_EIM_A23__IPU1_DISP1_DATA18	0x61
+				MX6QDL_PAD_EIM_A24__IPU1_DISP1_DATA19	0x61
+				MX6QDL_PAD_EIM_D31__IPU1_DISP1_DATA20	0x61
+				MX6QDL_PAD_EIM_D30__IPU1_DISP1_DATA21	0x61
+				MX6QDL_PAD_EIM_D26__IPU1_DISP1_DATA22	0x61
+				MX6QDL_PAD_EIM_D27__IPU1_DISP1_DATA23	0x61
+			>;
+		};
+		pinctrl_cam_mclk: cam_mclk {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_CS2__IPU1_SISG0	0x000b0		/* CAM sys_mclk */
+			>;
+		};
+		pinctrl_ipu1_csi0: ipu1csi0grp { /* parallel camera */
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT12__IPU1_CSI0_DATA12    0xb0b1
+				MX6QDL_PAD_CSI0_DAT13__IPU1_CSI0_DATA13    0xb0b1
+				MX6QDL_PAD_CSI0_DAT14__IPU1_CSI0_DATA14    0xb0b1
+				MX6QDL_PAD_CSI0_DAT15__IPU1_CSI0_DATA15    0xb0b1
+				MX6QDL_PAD_CSI0_DAT16__IPU1_CSI0_DATA16    0xb0b1
+				MX6QDL_PAD_CSI0_DAT17__IPU1_CSI0_DATA17    0xb0b1
+				MX6QDL_PAD_CSI0_DAT18__IPU1_CSI0_DATA18    0xb0b1
+				MX6QDL_PAD_CSI0_DAT19__IPU1_CSI0_DATA19    0xb0b1
+				MX6QDL_PAD_CSI0_PIXCLK__IPU1_CSI0_PIXCLK   0xb0b1
+				MX6QDL_PAD_CSI0_MCLK__IPU1_CSI0_HSYNC      0xb0b1
+				MX6QDL_PAD_CSI0_VSYNC__IPU1_CSI0_VSYNC     0xb0b1
+			>;
+		};
+	};
+
+	pwm {
+		pinctrl_pwm1: pwm1grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
+			>;
+		};
+		pinctrl_pwm2: pwm2grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
+			>;
+		};
+		pinctrl_pwm3: pwm3grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
+			>;
+		};
+		pinctrl_pwm4: pwm4grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
+			>;
+		};
+	};
+
+	spdif {
+		pinctrl_spdif: spdifgrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_16__SPDIF_IN  0x1b0b0
+				MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
+			>;
+		};
+	};
+
+	uart1 {
+		pinctrl_uart1_dce: uart1-dcegrp {
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
+				MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
+			>;
+		};
+		pinctrl_uart1_dte: uart1-dtegrp { /* DTE mode */
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
+				MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
+				MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
+				MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
+			>;
+		};
+		pinctrl_uart1_ctrl: uart1-ctrlgrp { /* Additional DTR, DSR, DCD */
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
+				MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
+				MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
+			>;
+		};
+	};
+
+	uart2 {
+		pinctrl_uart2_dce: uart2-dcegrp {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT4__UART2_RX_DATA   0x1b0b1
+				MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA   0x1b0b1
+			>;
+		};
+		pinctrl_uart2_dte: uart2grp-dte { /* DTE mode */
+			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA   0x1b0b1
+				MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA   0x1b0b1
+				MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
+				MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
+			>;
+		};
+	};
+
+	uart4 {
+		pinctrl_uart4_dce: uart4-dcegrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
+				MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
+			>;
+		};
+		pinctrl_uart4_dte: uart4-dtegrp { /* DTE mode */
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL0__UART4_RX_DATA 0x1b0b1
+				MX6QDL_PAD_KEY_ROW0__UART4_TX_DATA 0x1b0b1
+			>;
+		};
+	};
+
+	uart5 {
+		pinctrl_uart5_dce: uart5-dcegrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__UART5_TX_DATA 0x1b0b1
+				MX6QDL_PAD_KEY_ROW1__UART5_RX_DATA 0x1b0b1
+			>;
+		};
+		pinctrl_uart5_dte: uart5-dtegrp { /* DTE mode */
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL1__UART5_RX_DATA 0x1b0b1
+				MX6QDL_PAD_KEY_ROW1__UART5_TX_DATA 0x1b0b1
+			>;
+		};
+	};
+
+	usbh {
+		pinctrl_regulator_usbh_pwr: gpio_regulator_usbh_pwr {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_0__GPIO1_IO00		PAD_CTRL_PU_22k	/* USBH_EN */
+				>;
+		};
+	};
+
+	usbotg {
+		pinctrl_usbotg: usbotggrp {
+			fsl,pins = <
+				MX6QDL_PAD_ENET_RX_ER__USB_OTG_ID 0x17059
+			>;
+		};
+		pinctrl_regulator_usbotg_pwr: gpio_regulator_usbotg_pwr {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D22__GPIO3_IO22		PAD_CTRL_PU_22k	/* USBO power en */
+				>;
+		};
+	};
+
+	usdhc {
+		pinctrl_mmc_cd: gpio_mmc_cd {
+			fsl,pins = <
+				MX6QDL_PAD_DI0_PIN4__GPIO4_IO20		PAD_CTRL_NO	/* MMC1 CD */
+				>;
+		};
+		pinctrl_sd_cd: gpio_sd_cd {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14	PAD_CTRL_NO	/* SD1 CD */
+				>;
+		};
+		pinctrl_usdhc1: usdhc1grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17071
+				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10071
+				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+				MX6QDL_PAD_NANDF_D0__SD1_DATA4 0x17071
+				MX6QDL_PAD_NANDF_D1__SD1_DATA5 0x17071
+				MX6QDL_PAD_NANDF_D2__SD1_DATA6 0x17071
+				MX6QDL_PAD_NANDF_D3__SD1_DATA7 0x17071
+			>;
+		};
+		pinctrl_usdhc2: usdhc2grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD2_CMD__SD2_CMD    0x17059
+				MX6QDL_PAD_SD2_CLK__SD2_CLK    0x10059
+				MX6QDL_PAD_SD2_DAT0__SD2_DATA0 0x17059
+				MX6QDL_PAD_SD2_DAT1__SD2_DATA1 0x17059
+				MX6QDL_PAD_SD2_DAT2__SD2_DATA2 0x17059
+				MX6QDL_PAD_SD2_DAT3__SD2_DATA3 0x17059
+			>;
+		};
+	};
+};
+
+&ldb {
+	ipu_id = <1>;
+	disp_id = <1>;
+	ext_ref = <1>;
+	mode = "spl1";
+	sec_ipu_id = <1>;
+	sec_disp_id = <0>;
+	status = "okay";
+};
+
+&pwm1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm1>;
+	status = "disabled";
+};
+
+&pwm2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm2>;
+	status = "disabled";
+};
+
+&pwm3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm3>;
+	status = "disabled";
+};
+
+&pwm4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm4>;
+	status = "disabled";
+};
+
+&spdif {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spdif>;
+	status = "disabled";
+};
+
+&ssi1 {
+	fsl,mode = "i2s-slave";
+	status = "okay";
+};
+
+&uart1 {
+	pinctrl-names = "default";
+#ifndef USE_UART_IN_DCE_MODE
+	pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
+	fsl,dte-mode;
+	fsl,uart-has-rtscts;
+#else
+	pinctrl-0 = <&pinctrl_uart1_dce>;
+#endif
+	status = "disabled";
+};
+
+&uart2 {
+	pinctrl-names = "default";
+#ifndef USE_UART_IN_DCE_MODE
+	pinctrl-0 = <&pinctrl_uart2_dte>;
+	fsl,dte-mode;
+	fsl,uart-has-rtscts;
+#else
+	pinctrl-0 = <&pinctrl_uart2_dce>;
+#endif
+	status = "disabled";
+};
+
+&uart4 {
+	pinctrl-names = "default";
+#ifndef USE_UART_IN_DCE_MODE
+	pinctrl-0 = <&pinctrl_uart4_dte>;
+	fsl,dte-mode;
+#else
+	pinctrl-0 = <&pinctrl_uart4_dce>;
+#endif
+	status = "disabled";
+};
+
+&uart5 {
+	pinctrl-names = "default";
+#ifndef USE_UART_IN_DCE_MODE
+	pinctrl-0 = <&pinctrl_uart5_dte>;
+	fsl,dte-mode;
+#else
+	pinctrl-0 = <&pinctrl_uart5_dce>;
+#endif
+	status = "disabled";
+};
+
+&usbh1 {
+	vbus-supply = <&reg_usb_host_vbus>;
+	status = "disabled";
+};
+
+&usbotg {
+	vbus-supply = <&reg_usb_otg_vbus>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usbotg>;
+	disable-over-current;
+	status = "disabled";
+};
+
+/* MMC1 */
+&usdhc1 {
+	label = "MMC1";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
+	cd-gpios = <&gpio4 20 0>;
+	vmmc-supply = <&reg_3p3v>;
+	bus-width = <8>;
+	no-1-8-v;
+	status = "disabled";
+};
+
+/* SD1 */
+&usdhc2 {
+	label = "SD1";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc2 &pinctrl_sd_cd>;
+	cd-gpios = <&gpio6 14 0>;
+	vmmc-supply = <&reg_3p3v>;
+	bus-width = <4>;
+	no-1-8-v;
+	status = "disabled";
+};
+
+/* eMMC */
+&usdhc3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	vmmc-supply = <&reg_3p3v>;
+	bus-width = <8>;
+	no-1-8-v;
+	non-removable;
+	status = "okay";
+};
diff --git a/arch/arm/boot/dts/imx6qdl-colibri.dtsi b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
new file mode 100644
index 000000000000..1728539a33d4
--- /dev/null
+++ b/arch/arm/boot/dts/imx6qdl-colibri.dtsi
@@ -0,0 +1,985 @@
+/*
+ * Copyright 2014 Toradex AG
+ * Copyright 2012 Freescale Semiconductor, Inc.
+ * Copyright 2011 Linaro Ltd.
+ *
+ * The code contained herein is licensed under the GNU General Public
+ * License. You may obtain a copy of the GNU General Public License
+ * Version 2 or later at the following locations:
+ *
+ * http://www.opensource.org/licenses/gpl-license.html
+ * http://www.gnu.org/copyleft/gpl.html
+ */
+//#include <dt-bindings/input/input.h>
+
+/ {
+	model = "Toradex Colibri iMX6DL/S  Module";
+	compatible = "toradex,colibri_imx6dl", "fsl,imx6dl";
+
+	aliases {
+		mxcfb0 = &mxcfb1;
+		mxcfb1 = &mxcfb2;
+	};
+
+	backlight: backlight {
+		compatible = "pwm-backlight";
+		pwms = <&pwm3 0 5000000>;
+		status = "disabled";
+	};
+
+	clocks {
+		clk24m: clk24m {
+			compatible = "fixed-clock";
+			#clock-cells = <0>;
+			clock-frequency = <24000000>;
+		};
+	};
+
+/*
+ * DDC_I2C: I2C2_SDA/SCL on MXM3 pin 205/207
+ */
+	i2cddc: i2c@0 {
+		compatible = "i2c-gpio";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_i2c_ddc>;
+		gpios = <&gpio4 13 0 /* sda */
+			 &gpio4 12 0 /* scl */
+			>;
+		i2c-gpio,delay-us = <2>;	/* ~100 kHz */
+		#address-cells = <1>;
+		#size-cells = <0>;
+		status = "okay";
+	};
+
+	lcd: lcd@0 {
+		compatible = "fsl,lcd";
+		ipu_id = <0>;
+		disp_id = <0>;
+		default_ifmt = "RGB666";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_ipu1_t1>;
+		status = "disabled";
+	};
+
+	memory {
+		/* This node is rewritten by U-Boot with the actual memory size */
+		reg = <0x10000000 0x10000000>;
+	};
+
+	mxcfb1: fb@0 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "hdmi";
+		interface_pix_fmt = "RGB24";
+		mode_str ="1920x1080M@60";
+/*		default_bpp = <16>;*/
+		default_bpp = <24>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	mxcfb2: fb@1 {
+		compatible = "fsl,mxc_sdc_fb";
+		disp_dev = "lcd";
+		interface_pix_fmt = "RGB666";
+		mode_str ="EDT-WVGA";
+		default_bpp = <16>;
+		int_clk = <0>;
+		late_init = <0>;
+		status = "disabled";
+	};
+
+	regulators {
+		compatible = "simple-bus";
+
+		reg_1p8v: 1p8v {
+			compatible = "regulator-fixed";
+			regulator-name = "1P8V";
+			regulator-min-microvolt = <1800000>;
+			regulator-max-microvolt = <1800000>;
+			regulator-always-on;
+		};
+
+		reg_2p5v: 2p5v {
+			compatible = "regulator-fixed";
+			regulator-name = "2P5V";
+			regulator-min-microvolt = <2500000>;
+			regulator-max-microvolt = <2500000>;
+			regulator-always-on;
+		};
+
+		reg_3p3v: 3p3v {
+			compatible = "regulator-fixed";
+			regulator-name = "3P3V";
+			regulator-min-microvolt = <3300000>;
+			regulator-max-microvolt = <3300000>;
+			regulator-always-on;
+		};
+
+		reg_usb_host_vbus: usb_host_vbus {
+			compatible = "regulator-fixed";
+			pinctrl-names = "default";
+			pinctrl-0 = <&pinctrl_regulator_usbh_pwr>;
+			regulator-name = "usb_host_vbus";
+			regulator-min-microvolt = <5000000>;
+			regulator-max-microvolt = <5000000>;
+			gpio =  <&gpio3 31 0>;
+			status = "disabled";
+		};
+	};
+
+	sound {
+		compatible = "fsl,imx6-colibri-sgtl5000",
+			     "fsl,imx-audio-sgtl5000";
+		model = "imx6-colibri-sgtl5000";
+		cpu-dai = <&ssi1>;
+		audio-codec = <&codec>;
+		audio-routing =
+			"MIC_IN", "Mic Jack",
+			"Mic Jack", "Mic Bias",
+			"Headphone Jack", "HP_OUT";
+		mux-int-port = <1>;
+		mux-ext-port = <5>;
+	};
+
+	sound_hdmi: sound-hdmi {
+		compatible = "fsl,imx6q-audio-hdmi",
+			     "fsl,imx-audio-hdmi";
+		model = "imx-audio-hdmi";
+		hdmi-controller = <&hdmi_audio>;
+		status = "disabled";
+	};
+
+	sound_spdif: sound-spdif {
+		compatible = "fsl,imx-audio-spdif";
+		model = "imx-spdif";
+		spdif-controller = <&spdif>;
+		spdif-out;
+		/* spdif-in; */
+		status = "disabled";
+	};
+
+	v4l2_out {
+		compatible = "fsl,mxc_v4l2_output";
+		status = "okay";
+	};
+};
+
+&audmux {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_audmux &pinctrl_audmux_mclk &pinctrl_mic_gnd>;
+	status = "okay";
+};
+
+/* Colibri SPI */
+&ecspi4 {
+	fsl,spi-num-chipselects = <1>;
+	cs-gpios = <&gpio5 2 0>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_ecspi4 &pinctrl_spi_cs1>;
+	status = "disabled";
+};
+
+&fec {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_enet>;
+	phy-mode = "rmii";
+	status = "okay";
+};
+
+/* Colibri SDDIMM 55/63 */
+&flexcan1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan1>;
+	status = "disabled";
+};
+
+/* Colibri SODOMM 178/188 */
+&flexcan2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_flexcan2>;
+	status = "disabled";
+};
+
+&hdmi_audio {
+	status = "okay";
+};
+
+&hdmi_core {
+	ipu_id = <0>;
+	disp_id = <1>;
+	status = "disabled";
+};
+
+&hdmi_video {
+	fsl,phy_reg_vlev = <0x0294>;
+	fsl,phy_reg_cksymtx = <0x800d>;
+	status = "disabled";
+};
+
+&i2c2 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_i2c2>;
+	status = "okay";
+
+	pmic: pfuze100@08 {
+		compatible = "fsl,pfuze100";
+		reg = <0x08>;
+
+		regulators {
+			sw1a_reg: sw1ab {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw1c_reg: sw1c {
+				regulator-min-microvolt = <300000>;
+				regulator-max-microvolt = <1875000>;
+				regulator-boot-on;
+				regulator-always-on;
+				regulator-ramp-delay = <6250>;
+			};
+
+			sw3a_reg: sw3a {
+				regulator-min-microvolt = <400000>;
+				regulator-max-microvolt = <1975000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			swbst_reg: swbst {
+				regulator-min-microvolt = <5000000>;
+				regulator-max-microvolt = <5150000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			snvs_reg: vsnvs {
+				regulator-min-microvolt = <1000000>;
+				regulator-max-microvolt = <3000000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vref_reg: vrefddr {
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen2_reg: vgen2 {
+				regulator-min-microvolt = <800000>;
+				regulator-max-microvolt = <1550000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen4_reg: vgen4 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen5_reg: vgen5 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+
+			vgen6_reg: vgen6 {
+				regulator-min-microvolt = <1800000>;
+				regulator-max-microvolt = <3300000>;
+				regulator-boot-on;
+				regulator-always-on;
+			};
+		};
+	};
+
+	codec: sgtl5000@0a {
+		compatible = "fsl,sgtl5000";
+		reg = <0x0a>;
+		clocks = <&clks 201>;
+		VDDA-supply = <&reg_2p5v>;
+		VDDIO-supply = <&reg_3p3v>;
+	};
+
+	/* STMPE811 touch screen controller */
+	stmpe811@41 {
+		compatible = "st,stmpe811";
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_touch_int_1>;
+		#address-cells = <1>;
+		#size-cells = <0>;
+		reg = <0x41>;
+		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
+		interrupt-parent = <&gpio6>;
+		interrupt-controller;
+		id = <0>;
+		blocks = <0x5>;
+		irq-trigger = <0x1>;
+		stmpe_touchscreen {
+			compatible = "st,stmpe-ts";
+			reg = <0>;
+			/* 3.25 MHz ADC clock speed */
+			st,adc-freq = <1>;
+			/* 8 sample average control */
+			st,ave-ctrl = <3>;
+			/* 7 length fractional part in z */
+			st,fraction-z = <7>;
+			/*
+			 * 50 mA typical 80 mA max touchscreen drivers
+			 * current limit value
+			 */
+			st,i-drive = <1>;
+			/* 12-bit ADC */
+			st,mod-12b = <1>;
+			/* internal ADC reference */
+			st,ref-sel = <0>;
+			/* ADC converstion time: 80 clocks */
+			st,sample-time = <4>;
+			/* 1 ms panel driver settling time */
+			st,settling = <3>;
+			/* 5 ms touch detect interrupt delay */
+			st,touch-det-delay = <5>;
+		};
+		stmpe_adc {
+			compatible = "st,stmpe-adc";
+			/* 3.25 MHz ADC clock speed */
+			st,adc-freq = <1>;
+			/* 12-bit ADC */
+			st,mod-12b = <1>;
+			/* internal ADC reference */
+			st,ref-sel = <0>;
+			/* ADC converstion time: 80 clocks */
+			st,sample-time = <4>;
+		};
+	};
+};
+
+/*
+ * I2C: I2C3_SDA/SCL on SODIMM pin 194/196 (e.g. RTC on carrier
+ * board)
+ */
+&i2c3 {
+	clock-frequency = <100000>;
+	pinctrl-names = "default", "recovery";
+	pinctrl-0 = <&pinctrl_i2c3>;
+	pinctrl-1 = <&pinctrl_i2c3_recovery>;
+	gpios = <&gpio1 6 0 /* sda */
+	         &gpio1 3 0 /* scl */
+	        >;
+	status = "disabled";
+};
+
+/* PAD Ctrl Values for Common Settings */
+#define PAD_CTRL_HYS_PU 0x1b0b0 /*(PAD_CTL_HYS | PAD_CTL_PUS_100K_UP | PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)*/
+#define PAD_CTRL_HYS_PD 0x130b0 /*(PAD_CTL_HYS | PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED | PAD_CTL_DSE_40ohm)*/
+#define PAD_CTRL_PU_22k 0x0f058 /*(PAD_CTL_PUS_22K_UP | PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_LOW | PAD_CTL_DSE_80ohm)*/
+#define PAD_CTRL_IN 0x0040 /*( PAD_CTL_SPEED_LOW )*/
+#define PAD_CTRL_NO 0x80000000
+
+&iomuxc {
+	csi {
+		/* CSI pins used as GPIO */
+		pinctrl_csi_gpio_1: csi_gpio-1 {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_A24__GPIO5_IO04   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_SD2_CMD__GPIO1_IO11   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_CS2__GPIO6_IO15 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_D18__GPIO3_IO18   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_A19__GPIO2_IO19   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_D29__GPIO3_IO29   PAD_CTRL_HYS_PD
+				MX6QDL_PAD_EIM_A23__GPIO6_IO06   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_A20__GPIO2_IO18   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_A17__GPIO2_IO21   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_A18__GPIO2_IO20   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_EB3__GPIO2_IO31   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_D17__GPIO3_IO17   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_SD2_DAT0__GPIO1_IO15  PAD_CTRL_HYS_PU
+			>;
+		};
+	};
+
+	ecspi4 {
+		pinctrl_ecspi4: ecspi4grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
+				MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
+				MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
+			>;
+		};
+	};
+
+	enet {
+
+		pinctrl_enet: enetgrp { /* RMII */
+			fsl,pins = <
+				MX6QDL_PAD_ENET_MDC__ENET_MDC		0x1b0b0
+				MX6QDL_PAD_ENET_MDIO__ENET_MDIO		0x1b0b0
+				MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0	0x1b0b0
+				MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1	0x1b0b0
+				MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER	0x1b0b0
+				MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN	0x1b0b0
+				MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0	0x1b0b0
+				MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1	0x1b0b0
+				MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN	0x1b0b0
+				MX6QDL_PAD_GPIO_16__ENET_REF_CLK	((1<<30) | 0x1b0b0)
+			>;
+		};
+	};
+
+	flexcan1 {
+
+		pinctrl_flexcan1: flexcan1grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_7__FLEXCAN1_TX   0x80000000
+				MX6QDL_PAD_GPIO_8__FLEXCAN1_RX   0x80000000
+			>;
+		};
+		pinctrl_flexcan2: flexcan2grp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL4__FLEXCAN2_TX 0x80000000
+				MX6QDL_PAD_KEY_ROW4__FLEXCAN2_RX 0x80000000
+			>;
+		};
+	};
+
+	gpio {
+		pinctrl_gpio_1: gpio-1 {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_7__GPIO1_IO07       PAD_CTRL_HYS_PU
+				MX6QDL_PAD_GPIO_8__GPIO1_IO08       PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_D26__GPIO3_IO26      PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_D27__GPIO3_IO27      PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_D6__GPIO2_IO06     PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_D3__GPIO2_IO03     PAD_CTRL_HYS_PU
+				MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DI0_PIN4__GPIO4_IO20     PAD_CTRL_HYS_PU
+				MX6QDL_PAD_SD4_DAT3__GPIO2_IO11     PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_D4__GPIO2_IO04     PAD_CTRL_HYS_PU
+				MX6QDL_PAD_SD4_DAT0__GPIO2_IO08     PAD_CTRL_HYS_PU
+			>;
+		};
+	};
+
+	i2c {
+		pinctrl_i2c_ddc: i2c_ddc {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL3__GPIO4_IO12		PAD_CTRL_HYS_PU	/* DDC bitbang */
+				MX6QDL_PAD_KEY_ROW3__GPIO4_IO13		PAD_CTRL_HYS_PU	/* DDC bitbang */
+			>;
+		};
+		pinctrl_i2c3: i2c3grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_3__I2C3_SCL 0x4001b8b1
+				MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
+			>;
+		};
+		pinctrl_i2c3_recovery: i2c3-recoverygrp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x4001b8b1
+				MX6QDL_PAD_GPIO_6__GPIO1_IO06 0x4001b8b1
+			>;
+		};
+	};
+	/* pins used on module */
+	imx6dl-colibri {
+		pinctrl-names = "default";
+		pinctrl-0 = <&pinctrl_emmc_reset>;
+		pinctrl_audmux: audmuxgrp {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_COL0__AUD5_TXC  0x130b0
+				MX6QDL_PAD_KEY_ROW0__AUD5_TXD  0x130b0
+				MX6QDL_PAD_KEY_COL1__AUD5_TXFS 0x130b0
+				MX6QDL_PAD_KEY_ROW1__AUD5_RXD  0x130b0
+			>;
+		};
+		pinctrl_audmux_mclk: audmux_mclk {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_0__CCM_CLKO1		0x000b0		/* SGTL5000 sys_mclk */
+			>;
+		};
+		pinctrl_emmc_reset: emmc_reset {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_RST__GPIO7_IO08		PAD_CTRL_PU_22k	/* eMMC reset, leave it alone */
+			>;
+		};
+		pinctrl_gpio_keys: gpio_keys {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_A16__GPIO2_IO22		PAD_CTRL_HYS_PD	/* Power Button */
+			>;
+		};
+		pinctrl_i2c2: i2c2grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_EB2__I2C2_SCL 0x4001b8b1
+				MX6QDL_PAD_EIM_D16__I2C2_SDA 0x4001b8b1
+			>;
+		};
+		pinctrl_mic_gnd: gpio_mic_gnd {
+			fsl,pins = <
+				MX6QDL_PAD_RGMII_TD1__GPIO6_IO21	PAD_CTRL_HYS_PU	/* Controlls Mic GND, PU or '1' pull Mic GND to GND */
+			>;
+		};
+		pinctrl_pwm_a_cif_d7: pwm_d_cif_d7 {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_A22__GPIO2_IO16		PAD_CTRL_IN	/* disable, muxed with PWM<A> */
+			>;
+		};
+		pinctrl_pwm_d_cif_d6: pwm_d_cif_d6 {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_A21__GPIO2_IO17		PAD_CTRL_IN	/* disable, muxed with PWM<D> */
+			>;
+		};
+		pinctrl_regulator_usbh_pwr: gpio_regulator_usbh_pwr {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D31__GPIO3_IO31		PAD_CTRL_PU_22k	/* USBH_EN */
+			>;
+		};
+#if 0 //TODO
+		pinctrl_regulator_usbotg_pwr: gpio_regulator_usbotg_pwr {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D22__GPIO3_IO22		PAD_CTRL_PU_22k	/* USBO power en */
+			>;
+		};
+#endif
+		pinctrl_spi_cs1: spi_cs1 {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_A25__GPIO5_IO02		PAD_CTRL_NO	/* SPI cs */
+			>;
+		};
+		pinctrl_touch_int_1: touch_int-1 {
+			fsl,pins = <
+				MX6QDL_PAD_RGMII_TD0__GPIO6_IO20	PAD_CTRL_HYS_PU /* STMPE811 interrupt */
+			>;
+		};
+		pinctrl_usbh_oc_1: usbh_oc-1 {
+			fsl,pins = <
+				/* USBH_OC */
+				MX6QDL_PAD_EIM_D30__GPIO3_IO30		PAD_CTRL_HYS_PU
+			>;
+		};
+		pinctrl_usbc_id_1: usbc_id-1 {
+			fsl,pins = <
+				/* USBC_ID */
+				MX6QDL_PAD_NANDF_D2__GPIO2_IO02		PAD_CTRL_HYS_PU
+			>;
+		};
+		pinctrl_usbc_det_1: usbc_det-1 {
+			fsl,pins = <
+				/* USBC_DET */
+				MX6QDL_PAD_GPIO_17__GPIO7_IO12		PAD_CTRL_HYS_PU
+			>;
+		};
+		pinctrl_usdhc3: usdhc3grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD    0x17059
+				MX6QDL_PAD_SD3_CLK__SD3_CLK    0x10059
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x17059
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x17059
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x17059
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x17059
+			>;
+		};
+		pinctrl_usdhc3_100mhz: usdhc3grp-100mhz { /* 100Mhz */
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170B9
+				MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100B9
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170B9
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170B9
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170B9
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170B9
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170B9
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170B9
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170B9
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170B9
+			>;
+		};
+		pinctrl_usdhc3_200mhz: usdhc3grp-200mhz { /* 200Mhz */
+			fsl,pins = <
+				MX6QDL_PAD_SD3_CMD__SD3_CMD 0x170F9
+				MX6QDL_PAD_SD3_CLK__SD3_CLK 0x100F9
+				MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x170F9
+				MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x170F9
+				MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x170F9
+				MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x170F9
+				MX6QDL_PAD_SD3_DAT4__SD3_DATA4 0x170F9
+				MX6QDL_PAD_SD3_DAT5__SD3_DATA5 0x170F9
+				MX6QDL_PAD_SD3_DAT6__SD3_DATA6 0x170F9
+				MX6QDL_PAD_SD3_DAT7__SD3_DATA7 0x170F9
+			>;
+		};
+	};
+
+	ipu1 {
+
+		pinctrl_ipu1_t1: ipu1grp-t1 {
+			fsl,pins = <
+				MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
+				MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15       0x10
+				MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02        0x10
+				MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03        0x10
+				MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00   0x10
+				MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01   0x10
+				MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02   0x10
+				MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03   0x10
+				MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04   0x10
+				MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05   0x10
+				MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06   0x10
+				MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07   0x10
+				MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08   0x10
+				MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09   0x10
+				MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10  0x10
+				MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11  0x10
+				MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12  0x10
+				MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13  0x10
+				MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14  0x10
+				MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15  0x10
+				MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16  0x10
+				MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17  0x10
+			>;
+		};
+	};
+
+	pwm {
+		pinctrl_pwm1: pwm1grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
+			>;
+		};
+		pinctrl_pwm2: pwm2grp {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
+			>;
+		};
+		pinctrl_pwm3: pwm3grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
+			>;
+		};
+		pinctrl_pwm4: pwm4grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
+			>;
+		};
+	};
+
+	spdif {
+
+		pinctrl_spdif_t1: spdifgrp-t1 {
+			fsl,pins = <
+				MX6QDL_PAD_GPIO_17__SPDIF_OUT 0x1b0b0
+			>;
+		};
+	};
+
+	uart1 {
+		pinctrl_uart1_dte: uart1-dtegrp { /* DTE mode */
+			fsl,pins = <
+				MX6QDL_PAD_CSI0_DAT10__UART1_RX_DATA 0x1b0b1
+				MX6QDL_PAD_CSI0_DAT11__UART1_TX_DATA 0x1b0b1
+				MX6QDL_PAD_EIM_D19__UART1_RTS_B 0x1b0b1
+				MX6QDL_PAD_EIM_D20__UART1_CTS_B 0x1b0b1
+			>;
+		};
+		pinctrl_uart1_ctrl: uart1-ctrlgrp { /* Additional DTR, DSR, DCD */
+			fsl,pins = <
+				MX6QDL_PAD_EIM_D23__UART1_DCD_B 0x1b0b0
+				MX6QDL_PAD_EIM_D24__UART1_DTR_B 0x1b0b0
+				MX6QDL_PAD_EIM_D25__UART1_DSR_B 0x1b0b0
+			>;
+		};
+	};
+
+	uart2 {
+		pinctrl_uart2_dte: uart2grp-dte { /* DTE mode */			fsl,pins = <
+				MX6QDL_PAD_SD4_DAT4__UART2_TX_DATA   0x1b0b1
+				MX6QDL_PAD_SD4_DAT7__UART2_RX_DATA   0x1b0b1
+				MX6QDL_PAD_SD4_DAT6__UART2_RTS_B 0x1b0b1
+				MX6QDL_PAD_SD4_DAT5__UART2_CTS_B 0x1b0b1
+			>;
+		};
+	};
+
+	uart3 {
+		pinctrl_uart3_dte: uart3grp-dte { /* DTE mode */
+			fsl,pins = <
+				MX6QDL_PAD_SD4_CLK__UART3_TX_DATA 0x1b0b1
+				MX6QDL_PAD_SD4_CMD__UART3_RX_DATA 0x1b0b1
+			>;
+		};
+	};
+
+	usdhc {
+		pinctrl_mmc_cd: gpio_mmc_cd {
+			fsl,pins = <
+				MX6QDL_PAD_NANDF_D5__GPIO2_IO05		PAD_CTRL_NO	/* MMC1 CD */
+			>;
+		};
+		pinctrl_usdhc1: usdhc1grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD1_CMD__SD1_CMD    0x17071
+				MX6QDL_PAD_SD1_CLK__SD1_CLK    0x10071
+				MX6QDL_PAD_SD1_DAT0__SD1_DATA0 0x17071
+				MX6QDL_PAD_SD1_DAT1__SD1_DATA1 0x17071
+				MX6QDL_PAD_SD1_DAT2__SD1_DATA2 0x17071
+				MX6QDL_PAD_SD1_DAT3__SD1_DATA3 0x17071
+			>;
+		};
+	};
+
+	weim {
+		pinctrl_weim_cs0: weim_cs0grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_CS0__EIM_CS0_B   0xb0b1 /* nEXT_CS0 */
+			>;
+		};
+		pinctrl_weim_cs1: weim_cs1grp {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_CS1__EIM_CS1_B   0xb0b1 /* nEXT_CS1 */
+			>;
+		};
+		pinctrl_weim_cs2: weim_cs2grp {
+			fsl,pins = <
+				MX6QDL_PAD_SD2_DAT1__EIM_CS2_B  0xb0b1 /* nEXT_CS2 */
+			>;
+		};
+		pinctrl_weim_sram_1: weim_sramgrp-1 {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_OE__EIM_OE_B     0xb0b1
+				MX6QDL_PAD_EIM_RW__EIM_RW       0xb0b1
+				/* data */
+				MX6QDL_PAD_CSI0_DATA_EN__EIM_DATA00 0x1b0b0
+				MX6QDL_PAD_CSI0_VSYNC__EIM_DATA01 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT4__EIM_DATA02 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT5__EIM_DATA03 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT6__EIM_DATA04 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT7__EIM_DATA05 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT8__EIM_DATA06 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT9__EIM_DATA07 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT12__EIM_DATA08 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT13__EIM_DATA09 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT14__EIM_DATA10 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT15__EIM_DATA11 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT16__EIM_DATA12 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT17__EIM_DATA13 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT18__EIM_DATA14 0x1b0b0
+				MX6QDL_PAD_CSI0_DAT19__EIM_DATA15 0x1b0b0
+				/* address */
+				MX6QDL_PAD_EIM_DA15__EIM_AD15  0xb0b1
+				MX6QDL_PAD_EIM_DA14__EIM_AD14  0xb0b1
+				MX6QDL_PAD_EIM_DA13__EIM_AD13  0xb0b1
+				MX6QDL_PAD_EIM_DA12__EIM_AD12  0xb0b1
+				MX6QDL_PAD_EIM_DA11__EIM_AD11  0xb0b1
+				MX6QDL_PAD_EIM_DA10__EIM_AD10  0xb0b1
+				MX6QDL_PAD_EIM_DA9__EIM_AD09   0xb0b1
+				MX6QDL_PAD_EIM_DA8__EIM_AD08   0xb0b1
+				MX6QDL_PAD_EIM_DA7__EIM_AD07   0xb0b1
+				MX6QDL_PAD_EIM_DA6__EIM_AD06   0xb0b1
+				MX6QDL_PAD_EIM_DA5__EIM_AD05   0xb0b1
+				MX6QDL_PAD_EIM_DA4__EIM_AD04   0xb0b1
+				MX6QDL_PAD_EIM_DA3__EIM_AD03   0xb0b1
+				MX6QDL_PAD_EIM_DA2__EIM_AD02   0xb0b1
+				MX6QDL_PAD_EIM_DA1__EIM_AD01   0xb0b1
+				MX6QDL_PAD_EIM_DA0__EIM_AD00   0xb0b1
+			>;
+		};
+		pinctrl_weim_rdnwr_1: weim_rdnwr-1 {
+			fsl,pins = <
+				MX6QDL_PAD_SD2_CLK__GPIO1_IO10   PAD_CTRL_IN
+				MX6QDL_PAD_RGMII_TD3__GPIO6_IO23 PAD_CTRL_HYS_PD
+			>;
+		};
+		pinctrl_weim_npwe_1: weim_npwe-1 {
+			fsl,pins = <
+				MX6QDL_PAD_SD2_DAT3__GPIO1_IO12  PAD_CTRL_IN
+				MX6QDL_PAD_RGMII_TD2__GPIO6_IO22 PAD_CTRL_HYS_PD
+			>;
+		};
+
+		/* ADDRESS[16:18] [25] used as GPIO */
+		pinctrl_weim_gpio_1: weim_gpio-1 {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15    PAD_CTRL_HYS_PU
+				MX6QDL_PAD_KEY_ROW2__GPIO4_IO11    PAD_CTRL_HYS_PU
+				MX6QDL_PAD_KEY_COL2__GPIO4_IO10    PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_D1__GPIO2_IO01    PAD_CTRL_HYS_PU
+			>;
+		};
+		/* ADDRESS[19:24] used as GPIO */
+		pinctrl_weim_gpio_2: weim_gpio-2 {
+			fsl,pins = <
+				MX6QDL_PAD_KEY_ROW4__GPIO4_IO15    PAD_CTRL_HYS_PU
+				MX6QDL_PAD_KEY_ROW2__GPIO4_IO11    PAD_CTRL_HYS_PU
+				MX6QDL_PAD_KEY_COL2__GPIO4_IO10    PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_D1__GPIO2_IO01    PAD_CTRL_HYS_PU
+			>;
+		};
+		/* DATA[16:31]  used as GPIO */
+		pinctrl_weim_gpio_3: weim_gpio-3 {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_LBA__GPIO2_IO27     PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_BCLK__GPIO6_IO31    PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_CS3__GPIO6_IO16   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_CS1__GPIO6_IO14   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_RB0__GPIO6_IO10   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_ALE__GPIO6_IO08   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_WP_B__GPIO6_IO09  PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_CS0__GPIO6_IO11   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_CLE__GPIO6_IO07   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_GPIO_19__GPIO4_IO05     PAD_CTRL_HYS_PU
+				MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19   PAD_CTRL_HYS_PU
+				MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_GPIO_4__GPIO1_IO04      PAD_CTRL_HYS_PU
+				MX6QDL_PAD_GPIO_5__GPIO1_IO05      PAD_CTRL_HYS_PU
+				MX6QDL_PAD_KEY_COL4__GPIO4_IO14    PAD_CTRL_HYS_PU
+				MX6QDL_PAD_GPIO_2__GPIO1_IO02      PAD_CTRL_HYS_PU
+			>;
+		};
+		/* DQM[0:3]  used as GPIO */
+		pinctrl_weim_gpio_4: weim_gpio-4 {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_EB0__GPIO2_IO28  PAD_CTRL_HYS_PU
+				MX6QDL_PAD_EIM_EB1__GPIO2_IO29  PAD_CTRL_HYS_PU
+				MX6QDL_PAD_SD2_DAT2__GPIO1_IO13 PAD_CTRL_HYS_PU
+				MX6QDL_PAD_NANDF_D0__GPIO2_IO00 PAD_CTRL_HYS_PU
+			>;
+		};
+		/* RDY  used as GPIO */
+		pinctrl_weim_gpio_5: weim_gpio-5 {
+			fsl,pins = <
+				MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 PAD_CTRL_HYS_PU
+			>;
+		};
+	};
+};
+
+/* PWM B */
+&pwm1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm1>;
+	status = "disabled";
+};
+/* PWM D */
+&pwm2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm2 &pinctrl_pwm_d_cif_d6>;
+	status = "disabled";
+};
+/* PWM A */
+&pwm3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm3 &pinctrl_pwm_a_cif_d7>;
+	status = "disabled";
+};
+/* PWM C */
+&pwm4 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_pwm4>;
+	status = "disabled";
+};
+
+/* S/PDIF out on SODIMM137 */
+&spdif {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_spdif_t1>;
+	status = "disabled";
+};
+
+&ssi1 {
+	fsl,mode = "i2s-slave";
+	status = "okay";
+};
+
+/* UART A */
+&uart1 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart1_dte &pinctrl_uart1_ctrl>;
+	fsl,dte-mode;
+	fsl,uart-has-rtscts;
+	status = "disabled";
+};
+
+/* UART B */
+&uart2 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart2_dte>;
+	fsl,dte-mode;
+	fsl,uart-has-rtscts;
+	status = "disabled";
+};
+
+/* UART_C */
+&uart3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_uart3_dte>;
+	fsl,dte-mode;
+	status = "disabled";
+};
+
+&usbh1 {
+	vbus-supply = <&reg_usb_host_vbus>;
+	status = "disabled";
+};
+
+&usbotg {
+	pinctrl-names = "default";
+//	pinctrl-0 = <&pinctrl_usbotg_2>;
+	disable-over-current;
+//	dr_mode = "host"; //working when connected at boot
+	dr_mode = "otg"; //working as peripheral
+	status = "disabled";
+};
+
+/* MMC */
+&usdhc1 {
+	label = "MMC1";
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc1 &pinctrl_mmc_cd>;
+	cd-gpios = <&gpio2 5 0>;
+	vmmc-supply = <&reg_3p3v>;
+	bus-width = <4>;
+	no-1-8-v;
+	status = "disabled";
+};
+
+/* eMMC */
+&usdhc3 {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_usdhc3>;
+	vmmc-supply = <&reg_3p3v>;
+	bus-width = <8>;
+	no-1-8-v;
+	non-removable;
+	status = "okay";
+};
+
+&weim {
+	pinctrl-names = "default";
+	pinctrl-0 = <&pinctrl_weim_sram_1  &pinctrl_weim_cs0
+	             &pinctrl_weim_cs1   &pinctrl_weim_cs2
+	             &pinctrl_weim_rdnwr_1 &pinctrl_weim_npwe_1>;
+	#address-cells = <2>;
+	#size-cells = <1>;
+	status = "disabled";
+};