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authorFabio Estevam <fabio.estevam@nxp.com>2016-04-25 17:37:17 -0300
committerSasha Levin <alexander.levin@verizon.com>2017-07-31 13:37:47 -0400
commit42c059cbca0923edea391043ad2f200129db7f5b (patch)
tree210194e55450a2a1d6e71fbc76034efa16d2c046 /arch/arm/boot
parent8f163f8ca23b5471551f48ef889ad5d875b012fb (diff)
ARM: dts: imx6dl: Fix the VDD_ARM_CAP voltage for 396MHz operation
[ Upstream commit 46350b71a09ccf3573649e03db55d4b61d5da231 ] Table 8 from MX6DL datasheet (IMX6SDLCEC Rev. 5, 06/2015): http://cache.nxp.com/files/32bit/doc/data_sheet/IMX6SDLCEC.pdf states the following: "LDO Output Set Point (VDD_ARM_CAP) = 1.125 V minimum for operation up to 396 MHz." So fix the entry by adding the 25mV margin value as done in the other entries of the table, which results in 1.15V for 396MHz operation. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org> Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Diffstat (limited to 'arch/arm/boot')
-rw-r--r--arch/arm/boot/dts/imx6dl.dtsi2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/boot/dts/imx6dl.dtsi b/arch/arm/boot/dts/imx6dl.dtsi
index f94bf72832af..d6da4cc23920 100644
--- a/arch/arm/boot/dts/imx6dl.dtsi
+++ b/arch/arm/boot/dts/imx6dl.dtsi
@@ -30,7 +30,7 @@
/* kHz uV */
996000 1250000
792000 1175000
- 396000 1075000
+ 396000 1150000
>;
fsl,soc-operating-points = <
/* ARM kHz SOC-PU uV */