diff options
| author | Boris Suvorov <bsuvorov@nvidia.com> | 2012-02-24 13:22:28 -0800 |
|---|---|---|
| committer | Simone Willett <swillett@nvidia.com> | 2012-03-06 21:03:52 -0800 |
| commit | 5143b51f02f1f33a0633b11ac1b16f879fc02032 (patch) | |
| tree | e115482682c425a443e0425d504ec1367c700307 /arch/arm/configs/tegra3_defconfig | |
| parent | 3a61f22b25795f96f54234b08007dc541f2b78d2 (diff) | |
video: tegra: dsi: fix DSI_PAD_CONTROL reg wr value on resume
In panel resume path DSI_PAD_CONTROL value gets calibrated,
however later on values are overwritten with bit settings
for ulpm mode.
refactor value for reg write to only change ulpm related bits.
Change-Id: I9f9713bdf376c06b0e1b9f43b3e6c9f719bbd855
Signed-off-by: Boris Suvorov <bsuvorov@nvidia.com>
Reviewed-on: http://git-master/r/85873
Reviewed-by: Simone Willett <swillett@nvidia.com>
Tested-by: Simone Willett <swillett@nvidia.com>
Diffstat (limited to 'arch/arm/configs/tegra3_defconfig')
0 files changed, 0 insertions, 0 deletions