diff options
author | Colin Cross <ccross@android.com> | 2010-09-30 18:01:18 -0700 |
---|---|---|
committer | Colin Cross <ccross@android.com> | 2010-10-06 16:26:17 -0700 |
commit | 48751f29089588156f1f4ba9709aa4d3af674c38 (patch) | |
tree | 816811e22a5cf4fee75b4d225d4fea78018efc5f /arch/arm/include | |
parent | cd24a00ad75caf98ce0e2c6bae859c65b563940b (diff) |
[ARM] gic: Export irq chip functions
Some systems combine the GIC with an external interrupt controller.
On these systems it may be necessary to update both the GIC registers
and the external controller's registers to control IRQ behavior.
Export the irq chip functions so that these systems can define a
custom irq chip that calls into the GIC handlers.
Change-Id: I17fc4440fa2c91cc63004abf69c8e872b55c83c6
Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/include')
-rw-r--r-- | arch/arm/include/asm/hardware/gic.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/include/asm/hardware/gic.h b/arch/arm/include/asm/hardware/gic.h index 0a198b0f29c4..5fd0ff2bb821 100644 --- a/arch/arm/include/asm/hardware/gic.h +++ b/arch/arm/include/asm/hardware/gic.h @@ -41,6 +41,14 @@ void gic_cpu_init(unsigned int gic_nr, void __iomem *base); void gic_cpu_exit(unsigned int gic_nr); void gic_cascade_irq(unsigned int gic_nr, unsigned int irq); void gic_raise_softirq(const struct cpumask *mask, unsigned int irq); + +void gic_ack_irq(unsigned int irq); +void gic_mask_irq(unsigned int irq); +void gic_unmask_irq(unsigned int irq); +int gic_set_type(unsigned int irq, unsigned int type); +#ifdef CONFIG_SMP +int gic_set_cpu(unsigned int irq, const struct cpumask *mask_val); +#endif #endif #endif |