diff options
| author | Catalin Marinas <catalin.marinas@arm.com> | 2010-03-09 09:55:10 +0000 |
|---|---|---|
| committer | Colin Cross <ccross@android.com> | 2010-10-06 16:32:27 -0700 |
| commit | bc07eb9db1944ccad5c4476cce2728e68abaf981 (patch) | |
| tree | 25f4da1a79f908f03ebd0cc027b029b26e1cf526 /arch/arm/include | |
| parent | 98959c85632cde43fc83ba1b709f767fc3b8a4ee (diff) | |
ARMv7: Use lazy cache flushing if hardware broadcasts cache operations
ARMv7 processors like Cortex-A9 broadcast the cache maintenance
operations in hardware. The patch adds the CPU ID checks for such
feature and allows the flush_dcache_page/update_mmu_cache pair to work
in lazy flushing mode similar to the UP case.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Diffstat (limited to 'arch/arm/include')
| -rw-r--r-- | arch/arm/include/asm/smp_plat.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/include/asm/smp_plat.h b/arch/arm/include/asm/smp_plat.h index e6215305544a..963a338d567b 100644 --- a/arch/arm/include/asm/smp_plat.h +++ b/arch/arm/include/asm/smp_plat.h @@ -13,9 +13,13 @@ static inline int tlb_ops_need_broadcast(void) return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 2; } +#if !defined(CONFIG_SMP) || __LINUX_ARM_ARCH__ >= 7 +#define cache_ops_need_broadcast() 0 +#else static inline int cache_ops_need_broadcast(void) { return ((read_cpuid_ext(CPUID_EXT_MMFR3) >> 12) & 0xf) < 1; } +#endif #endif |