diff options
| author | Fugang Duan <b38611@freescale.com> | 2014-12-08 16:27:54 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-04-14 14:01:07 -0500 |
| commit | 10507697dac4dcebd318f5d7f6414a0cb81dfcdf (patch) | |
| tree | 6b5d6d0514005c0cefcc19deb3bab417c8e0f2b0 /arch/arm/mach-imx/clk-imx6sx.c | |
| parent | 9fa045e1c198d689eabb40d03d85acb3c8a5094e (diff) | |
MLK-9828 ARM: imx: change uart clk parent to pll3_80m on i.mx6sx in default
By default, uboot set uart clk parent to OSC to make UART work when M4
is enabled. In the situation, uart maximum baud rate only reach at 1.5Mbps
that cannot match real case requirement.
The patch set the uart module clock source to pll3_80m in default. If
test low power case, it needs to add "uart_from_osc" in kernel command line.
Signed-off-by: Fugang Duan <B38611@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx6sx.c')
| -rw-r--r-- | arch/arm/mach-imx/clk-imx6sx.c | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c index 2ff6cbf00e1a..e19884bc92f2 100644 --- a/arch/arm/mach-imx/clk-imx6sx.c +++ b/arch/arm/mach-imx/clk-imx6sx.c @@ -580,6 +580,8 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) /* Set the UART parent if needed. */ if (uart_from_osc) imx_clk_set_parent(clks[IMX6SX_CLK_UART_SEL], clks[IMX6SX_CLK_OSC]); + else + imx_clk_set_parent(clks[IMX6SX_CLK_UART_SEL], clks[IMX6SX_CLK_PLL3_80M]); /* pll2_bus is the best parent of QSPI clock */ imx_clk_set_parent(clks[IMX6SX_CLK_QSPI1_SEL], clks[IMX6SX_CLK_PLL2_BUS]); |