diff options
| author | Shawn Guo <shawn.guo@freescale.com> | 2014-09-15 19:46:55 +0800 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-04-14 14:00:03 -0500 |
| commit | 2cb0bd7d047b053e01f06b255dccba5b90eaaa00 (patch) | |
| tree | d50141d7481da260f0671d7a5777ef6f8235a5d3 /arch/arm/mach-imx/clk-imx6sx.c | |
| parent | 88b1bc6526dae0a12989dcf0b3c06fe922ea3d2f (diff) | |
ENGR00318063-12: ARM: imx6: enable clocks only after all parent and rate are initialized
This is a forward porting of commit ebf625e1a496 (ENGR00318063-12: ARM:
imx6: enable clocks only after all parent and rate are initialized) from
imx_3.10.y to imx_3.14.y.
Signed-off-by: Shawn Guo <shawn.guo@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx6sx.c')
| -rw-r--r-- | arch/arm/mach-imx/clk-imx6sx.c | 20 |
1 files changed, 12 insertions, 8 deletions
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c index c4ba60ef3203..6a57c7b7fd5a 100644 --- a/arch/arm/mach-imx/clk-imx6sx.c +++ b/arch/arm/mach-imx/clk-imx6sx.c @@ -522,14 +522,6 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) /* set perclk to from OSC */ imx_clk_set_parent(clks[IMX6SX_CLK_PERCLK_SEL], clks[IMX6SX_CLK_OSC]); - for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) - imx_clk_prepare_enable(clks[clks_init_on[i]]); - - if (IS_ENABLED(CONFIG_USB_MXS_PHY)) { - imx_clk_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]); - imx_clk_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]); - } - /* Set the default 132MHz for EIM module */ imx_clk_set_parent(clks[IMX6SX_CLK_EIM_SLOW_SEL], clks[IMX6SX_CLK_PLL2_PFD2]); imx_clk_set_rate(clks[IMX6SX_CLK_EIM_SLOW], 132000000); @@ -585,6 +577,18 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) if (uart_from_osc) imx_clk_set_parent(clks[IMX6SX_CLK_UART_SEL], clks[IMX6SX_CLK_OSC]); + /* + * Enable clocks only after both parent and rate are all initialized + * as needed + */ + for (i = 0; i < ARRAY_SIZE(clks_init_on); i++) + imx_clk_prepare_enable(clks[clks_init_on[i]]); + + if (IS_ENABLED(CONFIG_USB_MXS_PHY)) { + imx_clk_prepare_enable(clks[IMX6SX_CLK_USBPHY1_GATE]); + imx_clk_prepare_enable(clks[IMX6SX_CLK_USBPHY2_GATE]); + } + /* Set initial power mode */ imx6q_set_lpm(WAIT_CLOCKED); |