diff options
| author | Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com> | 2015-01-30 13:40:30 -0600 |
|---|---|---|
| committer | Nitin Garg <nitin.garg@freescale.com> | 2015-04-14 14:02:12 -0500 |
| commit | a5e5adc1f060a79090af2d453c1169bd49b93f17 (patch) | |
| tree | 7dfde46b979bf51643f74d4520ba9bf0c38d55bd /arch/arm/mach-imx/clk-imx6sx.c | |
| parent | fcdf471861c00b30a8cdf913bc36a1f84991815c (diff) | |
MLK-9961-4 arm:imx6x: Change PLL1 clock management.
Add support to leave PLL1 enabled since its required whenever ARM-PODF is
changed. With this patch PLL1 is set to bypassed mode (and enabled) whenever
ARM is sourced from step_clk.
Signed-off-by: Ranjani Vaidyanathan <Ranjani.Vaidyanathan@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/clk-imx6sx.c')
| -rw-r--r-- | arch/arm/mach-imx/clk-imx6sx.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c index f64bf9a7b7ec..f61237db3cda 100644 --- a/arch/arm/mach-imx/clk-imx6sx.c +++ b/arch/arm/mach-imx/clk-imx6sx.c @@ -239,7 +239,7 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) imx_clk_set_parent(clks[IMX6SX_PLL6_BYPASS], clks[IMX6SX_CLK_PLL6]); imx_clk_set_parent(clks[IMX6SX_PLL7_BYPASS], clks[IMX6SX_CLK_PLL7]); - clks[IMX6SX_CLK_PLL1_SYS] = imx_clk_gate("pll1_sys", "pll1_bypass", base + 0x00, 13); + clks[IMX6SX_CLK_PLL1_SYS] = imx_clk_fixed_factor("pll1_sys", "pll1_bypass", 1, 1); clks[IMX6SX_CLK_PLL2_BUS] = imx_clk_gate("pll2_bus", "pll2_bypass", base + 0x30, 13); clks[IMX6SX_CLK_PLL3_USB_OTG] = imx_clk_gate("pll3_usb_otg", "pll3_bypass", base + 0x10, 13); clks[IMX6SX_CLK_PLL4_AUDIO] = imx_clk_gate("pll4_audio", "pll4_bypass", base + 0x70, 13); |