diff options
| author | Bai Ping <b51503@freescale.com> | 2015-04-24 01:13:35 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2015-05-08 16:35:37 +0800 |
| commit | 8ee5e950ac94046071a2346806945e621fa64ee2 (patch) | |
| tree | 22b8e251fc9a73aeb52d78b0e09c8b7238b1a81b /arch/arm/mach-imx/gpc.c | |
| parent | 45583aa93ee7d3f8e930854603121f7facdcffb9 (diff) | |
MLK-10781 ARM: imx: add DSM mode support for i.mx6ul
Add DSM mode support for i.MX6UL. on i.MX6UL, only the arm core is
differnt from the the i.MX6 family. It is a Cortex-a7 core, The cache
maintenance operations is slightly different from cortex-a9. Most of
the IP like GPC, CCM and SRC is the same as other imx6 processor,
reuse the code for other i.MX6 processor, only add conditon check to
run the code specific to i.MX6UL.
Signed-off-by: Bai Ping <b51503@freescale.com>
Diffstat (limited to 'arch/arm/mach-imx/gpc.c')
| -rw-r--r-- | arch/arm/mach-imx/gpc.c | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/gpc.c b/arch/arm/mach-imx/gpc.c index 983bf3319866..a85ba3ebe5c2 100644 --- a/arch/arm/mach-imx/gpc.c +++ b/arch/arm/mach-imx/gpc.c @@ -170,7 +170,7 @@ void imx_gpc_pre_suspend(bool arm_power_off) imx6q_pu_pgc_power_off(&imx6q_pu_domain, true); /* Tell GPC to power off ARM core when suspend */ - if (cpu_is_imx6sx() && arm_power_off) + if ((cpu_is_imx6sx() || cpu_is_imx6ul()) && arm_power_off) imx_gpc_mf_mix_off(); if (arm_power_off) @@ -193,7 +193,7 @@ void imx_gpc_post_resume(void) /* Keep ARM core powered on for other low-power modes */ writel_relaxed(0x0, gpc_base + GPC_PGC_CPU_PDN); /* Keep M/F mix powered on for other low-power modes */ - if (cpu_is_imx6sx()) + if (cpu_is_imx6sx() || cpu_is_imx6ul()) writel_relaxed(0x0, gpc_base + GPC_PGC_MF_PDN); for (i = 0; i < IMR_NUM; i++) |