diff options
| author | Clement Faure <clement.faure@nxp.com> | 2018-05-24 14:52:30 +0200 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:32:00 +0800 |
| commit | 4be2c7a966cfa7b2a1c2ceb6c95f0ab88811daa5 (patch) | |
| tree | d68297799da27fa5412aaa931a8d9dd525af4226 /arch/arm/mach-imx | |
| parent | 7e37ee6b3582e1e0bc228d6e9d10707c29c2f9ff (diff) | |
MLK-18025: ARM: imx: Fix suspend initialization for Optee on imx7ulp
Before the kernel starts, optee uses M4 SRAM to allocate its
suspend function. When imx7ulp_pm_map_io() executes, the psci
driver and psci_ops.cpu_suspend are not initialized yet. This
causes the memset to always wipe the optee suspend code in the
M4 SRAM.
Signed-off-by: Clement Faure <clement.faure@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/pm-imx7ulp.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/arm/mach-imx/pm-imx7ulp.c b/arch/arm/mach-imx/pm-imx7ulp.c index 777d3ca98eeb..41c7d391d706 100644 --- a/arch/arm/mach-imx/pm-imx7ulp.c +++ b/arch/arm/mach-imx/pm-imx7ulp.c @@ -574,9 +574,6 @@ static int __init imx7ulp_dt_find_lpsram(unsigned long node, const char *uname, void __init imx7ulp_pm_map_io(void) { - if (psci_ops.cpu_suspend) { - return; - } /* * Get the address of IRAM or OCRAM to be used by the low * power code from the device tree. @@ -588,9 +585,6 @@ void __init imx7ulp_pm_map_io(void) pr_warn("No valid ocram available for suspend/resume!\n"); return; } - - /* Set all entries to 0 except first 3 words reserved for M4. */ - memset((void *)iram_tlb_base_addr, 0, MX7ULP_IRAM_TLB_SIZE); } void __init imx7ulp_pm_common_init(const struct imx7ulp_pm_socdata @@ -610,6 +604,9 @@ void __init imx7ulp_pm_common_init(const struct imx7ulp_pm_socdata aips4_base = ioremap(MX7ULP_AIPS4_BASE_ADDR, SZ_1M); aips5_base = ioremap(MX7ULP_AIPS5_BASE_ADDR, SZ_1M); } else { + /* Set all entries to 0 except first 3 words reserved for M4. */ + memset((void *)iram_tlb_base_addr, 0, MX7ULP_IRAM_TLB_SIZE); + /* * Make sure the IRAM virtual address has a mapping in the IRAM * page table. |