diff options
| author | Bai Ping <ping.bai@nxp.com> | 2018-09-14 17:19:20 +0800 |
|---|---|---|
| committer | Jason Liu <jason.hui.liu@nxp.com> | 2019-02-12 10:34:05 +0800 |
| commit | c7e8a6696c7e5b6a0ba6d114b20605d651fe5fdd (patch) | |
| tree | 91add1b8c7641477aad781de32cc7b296f9a59ee /arch/arm/mach-imx | |
| parent | fb03631382d0d349d1a2e78ecdbf697f12961a92 (diff) | |
MLK-19589-01 ARM: imx: add imx6ulz basic support
The i.MX6ULZ is new SOC of the i.MX6 series. it
is SW compatile with i.MX6ULL, so most of the code
can be reuse from i.MX6ULL. To maximum the SW reuse,
i.MX6ULZ don't have an independent SOC id in anamix.
so a dummy ID is used to identify it.
Signed-off-by: Bai Ping <ping.bai@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/anatop.c | 17 | ||||
| -rw-r--r-- | arch/arm/mach-imx/cpu.c | 3 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mach-imx6ul.c | 1 | ||||
| -rw-r--r-- | arch/arm/mach-imx/mxc.h | 7 |
4 files changed, 25 insertions, 3 deletions
diff --git a/arch/arm/mach-imx/anatop.c b/arch/arm/mach-imx/anatop.c index d46f68417bbb..7716fd5fe58a 100644 --- a/arch/arm/mach-imx/anatop.c +++ b/arch/arm/mach-imx/anatop.c @@ -207,8 +207,9 @@ void __init imx_init_revision_from_anatop(void) { struct device_node *np; void __iomem *anatop_base; + void __iomem *src_base; unsigned int revision; - u32 digprog; + u32 digprog, sbmr2 = 0; u16 offset = ANADIG_DIGPROG; u16 major_part, minor_part; @@ -222,6 +223,20 @@ void __init imx_init_revision_from_anatop(void) digprog = readl_relaxed(anatop_base + offset); iounmap(anatop_base); + if ((digprog >> 16) == MXC_CPU_IMX6ULL) { + np = of_find_compatible_node(NULL, NULL, "fsl,imx6ul-src"); + if (np) { + src_base = of_iomap(np, 0); + WARN_ON(!src_base); + sbmr2 = readl_relaxed(src_base + 0x1c); + iounmap(src_base); + } + if (sbmr2 & (1 << 6)) { + digprog &= ~(0xff << 16); + digprog |= (MXC_CPU_IMX6ULZ << 16); + } + } + /* * On i.MX7D digprog value match linux version format, so * it needn't map again and we can use register value directly. diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c index cb1b1fcc9322..9f53229d8b5a 100644 --- a/arch/arm/mach-imx/cpu.c +++ b/arch/arm/mach-imx/cpu.c @@ -138,6 +138,9 @@ struct device * __init imx_soc_device_init(void) case MXC_CPU_IMX6ULL: soc_id = "i.MX6ULL"; break; + case MXC_CPU_IMX6ULZ: + soc_id = "i.MX6ULZ"; + break; case MXC_CPU_IMX7D: soc_id = "i.MX7D"; break; diff --git a/arch/arm/mach-imx/mach-imx6ul.c b/arch/arm/mach-imx/mach-imx6ul.c index 851034d5f73f..99eb8ad811cb 100644 --- a/arch/arm/mach-imx/mach-imx6ul.c +++ b/arch/arm/mach-imx/mach-imx6ul.c @@ -210,6 +210,7 @@ static void __init imx6ul_map_io(void) static const char * const imx6ul_dt_compat[] __initconst = { "fsl,imx6ul", "fsl,imx6ull", + "fsl,imx6ulz", NULL, }; diff --git a/arch/arm/mach-imx/mxc.h b/arch/arm/mach-imx/mxc.h index f162e82d3ca1..95e7c3e6f141 100644 --- a/arch/arm/mach-imx/mxc.h +++ b/arch/arm/mach-imx/mxc.h @@ -41,6 +41,7 @@ #define MXC_CPU_IMX6UL 0x64 #define MXC_CPU_IMX6ULL 0x65 #define MXC_CPU_IMX6SLL 0x67 +#define MXC_CPU_IMX6ULZ 0x6B #define MXC_CPU_IMX7D 0x72 #define MXC_CPU_IMX7ULP 0xff /* TBD */ @@ -84,7 +85,8 @@ static inline bool cpu_is_imx6ul(void) static inline bool cpu_is_imx6ull(void) { - return __mxc_cpu_type == MXC_CPU_IMX6ULL; + return __mxc_cpu_type == MXC_CPU_IMX6ULL || + __mxc_cpu_type == MXC_CPU_IMX6ULZ; } static inline bool cpu_is_imx6sll(void) @@ -105,7 +107,8 @@ static inline bool cpu_is_imx6(void) __mxc_cpu_type == MXC_CPU_IMX6SX || __mxc_cpu_type == MXC_CPU_IMX6UL || __mxc_cpu_type == MXC_CPU_IMX6ULL || - __mxc_cpu_type == MXC_CPU_IMX6SLL; + __mxc_cpu_type == MXC_CPU_IMX6SLL || + __mxc_cpu_type == MXC_CPU_IMX6ULZ; } static inline bool cpu_is_imx7d(void) |