diff options
| author | Sandor Yu <Sandor.yu@nxp.com> | 2016-07-21 17:44:51 +0800 |
|---|---|---|
| committer | Sandor Yu <Sandor.yu@nxp.com> | 2016-08-02 18:42:58 +0800 |
| commit | 251bf23ea5e23c1832c13b3173972e139c5107c9 (patch) | |
| tree | e7687f4a9444aa9746854e17d3edccdc75fc5922 /arch/arm/mach-imx | |
| parent | 2971fba6766d0247678ed0236f5104d8a9f620f8 (diff) | |
MLK-12978: arm: clk: i.MX6SX set lcdif2 pixel clk parent to ldb_di0
i.MX6SX LDB will connect to LCDIF2.
And LCDIF2 pixel clock can not re-parent when it's on.
So default setting clock parent to ldb_di0.
Signed-off-by: Sandor Yu <Sandor.yu@nxp.com>
Diffstat (limited to 'arch/arm/mach-imx')
| -rw-r--r-- | arch/arm/mach-imx/clk-imx6sx.c | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/clk-imx6sx.c b/arch/arm/mach-imx/clk-imx6sx.c index 62b61daf8e92..8ca74e712d1c 100644 --- a/arch/arm/mach-imx/clk-imx6sx.c +++ b/arch/arm/mach-imx/clk-imx6sx.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2014-2015 Freescale Semiconductor, Inc. + * Copyright (C) 2014-2016 Freescale Semiconductor, Inc. * * The code contained herein is licensed under the GNU General Public * License. You may obtain a copy of the GNU General Public License @@ -598,6 +598,9 @@ static void __init imx6sx_clocks_init(struct device_node *ccm_node) imx_clk_set_parent(clks[IMX6SX_CLK_LCDIF1_PRE_SEL], clks[IMX6SX_CLK_PLL5_VIDEO_DIV]); imx_clk_set_parent(clks[IMX6SX_CLK_LCDIF1_SEL], clks[IMX6SX_CLK_LCDIF1_PODF]); + /* set parent clock for LCDIF2 */ + imx_clk_set_parent(clks[IMX6SX_CLK_LCDIF2_SEL], clks[IMX6SX_CLK_LDB_DI0]); + /* Set the parent clks of PCIe lvds1 and pcie_axi to be pcie ref, axi */ imx_clk_set_parent(clks[IMX6SX_CLK_LVDS1_SEL], clks[IMX6SX_CLK_PCIE_REF_125M]); imx_clk_set_parent(clks[IMX6SX_CLK_PCIE_AXI_SEL], clks[IMX6SX_CLK_AXI]); |