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authorNancy Chen <Nancy.Chen@freescale.com>2010-04-06 23:12:19 -0500
committerAlejandro Gonzalez <alex.gonzalez@digi.com>2010-05-25 11:20:22 +0200
commit1711eb5cd1f217ba759cdfe211f38244b459110a (patch)
tree0f6be6c2e41df1af6d68d8a89daa16200ee49cbc /arch/arm/mach-mx28
parent1b86778c6746d9173d8d00dd615318472f72ce60 (diff)
ENGR00121905-2 MX28: Restructure cpufreq driver
Restructure cpufreq driver. Fix clock count not right. Fix cpu frequency can not be changed from 64 MHz. Add cpufreq trig update feature. Signed-off-by: Nancy Chen <Nancy.Chen@freescale.com> Signed-off-by: Alejandro Gonzalez <alex.gonzalez@digi.com>
Diffstat (limited to 'arch/arm/mach-mx28')
-rw-r--r--arch/arm/mach-mx28/bus_freq.c11
-rw-r--r--arch/arm/mach-mx28/clock.c6
2 files changed, 11 insertions, 6 deletions
diff --git a/arch/arm/mach-mx28/bus_freq.c b/arch/arm/mach-mx28/bus_freq.c
index 5a36ce207eee..a997eaa9a01f 100644
--- a/arch/arm/mach-mx28/bus_freq.c
+++ b/arch/arm/mach-mx28/bus_freq.c
@@ -52,15 +52,15 @@
#define BF(value, field) (((value) << BP_##field) & BM_##field)
struct profile profiles[] = {
- { 454740, 151580, 196360, 0, 1550000,
+ { 454736, 151580, 196360, 0, 1550000,
1450000, 355000, 3300000, 1750000, 0 },
- { 392730, 130910, 160000, 0, 1475000,
+ { 392727, 130910, 160000, 0, 1475000,
1375000, 225000, 3300000, 1750000, 0 },
- { 360000, 120000, 120000, 0, 1375000,
+ { 360000, 120000, 130910, 0, 1375000,
1275000, 200000, 3300000, 1750000, 0 },
- { 261820, 130910, 130910, 0, 1275000,
+ { 261818, 130910, 130910, 0, 1275000,
1175000, 173000, 3300000, 1750000, 0 },
- { 64000, 64000, 96000, 3, 1050000,
+ { 64000, 64000, 130910, 3, 1050000,
975000, 150000, 3300000, 1750000, 0 },
{ 0, 0, 0, 0, 0,
0, 0, 0, 0, 0 },
@@ -70,7 +70,6 @@ static struct device *busfreq_dev;
static struct clk *usb_clk0;
static struct clk *usb_clk1;
static struct clk *lcdif_clk;
-const char *ahb_clk_id = "h";
u32 clkseq_setting;
int low_freq_used(void)
diff --git a/arch/arm/mach-mx28/clock.c b/arch/arm/mach-mx28/clock.c
index 2439fbfd92e3..8e7adea7c09d 100644
--- a/arch/arm/mach-mx28/clock.c
+++ b/arch/arm/mach-mx28/clock.c
@@ -734,6 +734,9 @@ static int h_set_rate(struct clk *clk, unsigned long rate)
if (root_rate % round_rate)
return -EINVAL;
+ if ((root_rate < rate) && (root_rate == 64000000))
+ div = 3;
+
reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_HBUS);
reg &= ~(BM_CLKCTRL_HBUS_DIV_FRAC_EN | BM_CLKCTRL_HBUS_DIV);
reg |= BF_CLKCTRL_HBUS_DIV(div);
@@ -1117,6 +1120,7 @@ static struct clk dis_lcdif_clk = {
.get_rate = lcdif_get_rate,
.set_rate = lcdif_set_rate,
.set_parent = lcdif_set_parent,
+ .flags = CPU_FREQ_TRIG_UPDATE,
};
static unsigned long hsadc_get_rate(struct clk *clk)
@@ -1439,6 +1443,7 @@ static struct clk usb_clk0 = {
.disable = mx28_raw_disable,
.enable_reg = DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL,
.enable_bits = BM_DIGCTL_CTRL_USB0_CLKGATE,
+ .flags = CPU_FREQ_TRIG_UPDATE,
};
/* usb_clk for usb1 */
@@ -1448,6 +1453,7 @@ static struct clk usb_clk1 = {
.disable = mx28_raw_disable,
.enable_reg = DIGCTRL_BASE_ADDR + HW_DIGCTL_CTRL,
.enable_bits = BM_DIGCTL_CTRL_USB1_CLKGATE,
+ .flags = CPU_FREQ_TRIG_UPDATE,
};
static struct clk enet_out_clk = {