diff options
| author | Richard Zhu <Hong-Xing.Zhu@freescale.com> | 2012-05-18 10:25:49 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2012-07-20 13:39:08 +0800 |
| commit | 0665062cdf6b558d8f66800ea5944a953aa0741a (patch) | |
| tree | a7278fa7441792b509f35c89ed260ee336f1e6b3 /arch/arm/mach-mx6/board-mx6q_sabreauto.c | |
| parent | 5116bdd64bcfd3474ca4c0f875671eeeaf451997 (diff) | |
ENGR00214799 MX6 PCIe enable the GEN2 mode
* enable PCIe on ARD boards
* Configure the DEEM parameters to pass PCIe GEN2 stress tests
Signed-off-by: Richard Zhu <Hong-Xing.Zhu@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/board-mx6q_sabreauto.c')
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_sabreauto.c | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/board-mx6q_sabreauto.c b/arch/arm/mach-mx6/board-mx6q_sabreauto.c index 656508f9fab8..c26015607868 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabreauto.c +++ b/arch/arm/mach-mx6/board-mx6q_sabreauto.c @@ -120,6 +120,7 @@ #define SABREAUTO_IO_EXP_GPIO2(x) (SABREAUTO_MAX7310_2_BASE_ADDR + (x)) #define SABREAUTO_IO_EXP_GPIO3(x) (SABREAUTO_MAX7310_3_BASE_ADDR + (x)) +#define SABREAUTO_PCIE_RST_B_REVB (SABREAUTO_MAX7310_1_BASE_ADDR + 2) /* * CAN2 STBY and EN lines are the same as the CAN1. These lines are not * independent. @@ -1297,6 +1298,12 @@ static struct fsl_mxc_capture_platform_data capture_data[] = { }, }; +static const struct imx_pcie_platform_data mx6_sabreauto_pcie_data __initconst = { + .pcie_pwr_en = -EINVAL, + .pcie_rst = SABREAUTO_PCIE_RST_B_REVB, + .pcie_wake_up = -EINVAL, + .pcie_dis = -EINVAL, +}; /*! * Board specific initialization. @@ -1570,6 +1577,9 @@ static void __init mx6_board_init(void) mxc_register_device(&mxc_si4763_audio_device, &si4763_audio_data); imx6q_add_busfreq(); + + /* Add PCIe RC interface support */ + imx6q_add_pcie(&mx6_sabreauto_pcie_data); } extern void __iomem *twd_base; |