diff options
| author | Robin Gong <b38343@freescale.com> | 2012-08-11 16:36:35 +0800 |
|---|---|---|
| committer | Robin Gong <b38343@freescale.com> | 2012-08-13 10:42:07 +0800 |
| commit | 0dbe59545a8b2b86d7d0a966b28e4e7f99cef426 (patch) | |
| tree | 98d077a5b40ba3d9e8553de09b95e8cbb860f6d6 /arch/arm/mach-mx6/board-mx6q_sabreauto.c | |
| parent | 1f4aead453351d7d9658f6ebb31f6deaea3262b6 (diff) | |
ENGR00220153 cpufreq mx6: new cpu set point and add VDDSOC/PU adjust
1.add new cpu setpoint: replace 498Mhz with 672Mhz,and remove 198Mhz.
but now 498Mhz seems not stable enough, comment now, test enough to
add it. Rigel kept unchange now.
2.support adjusting VDDSOC/VDDPU when cpu frequency change.
Signed-off-by: Robin Gong <b38343@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/board-mx6q_sabreauto.c')
| -rw-r--r-- | arch/arm/mach-mx6/board-mx6q_sabreauto.c | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/board-mx6q_sabreauto.c b/arch/arm/mach-mx6/board-mx6q_sabreauto.c index 3adf51f60c2f..eb9fb30d73af 100644 --- a/arch/arm/mach-mx6/board-mx6q_sabreauto.c +++ b/arch/arm/mach-mx6/board-mx6q_sabreauto.c @@ -136,6 +136,10 @@ #define SABREAUTO_USB_OTG_PWR SABREAUTO_IO_EXP_GPIO3(1) #define BMCR_PDOWN 0x0800 /* PHY Powerdown */ +extern char *gp_reg_id; +extern char *soc_reg_id; +extern char *pu_reg_id; + static int mma8451_position = 3; static struct clk *sata_clk; static int mipi_sensor; @@ -1256,6 +1260,8 @@ static struct mxc_mlb_platform_data mx6_sabreauto_mlb150_data = { static struct mxc_dvfs_platform_data sabreauto_dvfscore_data = { .reg_id = "cpu_vddgp", + .soc_id = "cpu_vddsoc", + .pu_id = "cpu_vddvpu", .clk1_id = "cpu_clk", .clk2_id = "gpc_dvfs_clk", .gpc_cntr_offset = MXC_GPC_CNTR_OFFSET, @@ -1479,6 +1485,8 @@ static void __init mx6_board_init(void) } gp_reg_id = sabreauto_dvfscore_data.reg_id; + soc_reg_id = sabreauto_dvfscore_data.soc_id; + pu_reg_id = sabreauto_dvfscore_data.pu_id; mx6q_sabreauto_init_uart(); imx6q_add_mipi_csi2(&mipi_csi2_pdata); if (cpu_is_mx6dl()) { |