diff options
| author | Anson Huang <b20788@freescale.com> | 2012-08-28 17:43:01 +0800 |
|---|---|---|
| committer | Anson Huang <b20788@freescale.com> | 2012-08-29 10:02:27 +0800 |
| commit | 4630c97b33a135026560d4d17c6b0b8e14253ff5 (patch) | |
| tree | e1058ca5efda8208d0c714e169a7ffa0cf465cdb /arch/arm/mach-mx6/clock_mx6sl.c | |
| parent | 8653ba355543b2c0adbfb876701aee36053a73d5 (diff) | |
ENGR00221643 [MX6]Fix race condition of pfd 400 usecount
We can't modify the usecount of pfd 400M clock when ARM freq
is changed, as when the children of pfd 400M do clock enable/disable,
they will also modify this usecount, these two modification is
out of same lock protection. And this wrong usecount may lead to
pfd 400M or pll2 disabled accidently, and it will cause system hang!
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/clock_mx6sl.c')
| -rwxr-xr-x | arch/arm/mach-mx6/clock_mx6sl.c | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/arch/arm/mach-mx6/clock_mx6sl.c b/arch/arm/mach-mx6/clock_mx6sl.c index 4839f1542b3a..7a66d10c3aab 100755 --- a/arch/arm/mach-mx6/clock_mx6sl.c +++ b/arch/arm/mach-mx6/clock_mx6sl.c @@ -1168,7 +1168,6 @@ static int _clk_arm_set_rate(struct clk *clk, unsigned long rate) */ if (pll1_sw_clk.parent != &pll2_pfd2_400M) { pll2_pfd2_400M.enable(&pll2_pfd2_400M); - pll2_pfd2_400M.usecount++; arm_needs_pll2_400 = true; pll1_sw_clk.set_parent(&pll1_sw_clk, &pll2_pfd2_400M); pll1_sw_clk.parent = &pll2_pfd2_400M; @@ -1192,8 +1191,6 @@ static int _clk_arm_set_rate(struct clk *clk, unsigned long rate) pll1_sw_clk.set_parent(&pll1_sw_clk, &pll1_sys_main_clk); pll1_sw_clk.parent = &pll1_sys_main_clk; - if (arm_needs_pll2_400) - pll2_pfd2_400M.usecount--; arm_needs_pll2_400 = false; if (pll2_pfd2_400M.usecount == 0) pll2_pfd2_400M.disable(&pll2_pfd2_400M); |