diff options
| author | Anson Huang <b20788@freescale.com> | 2012-06-18 10:58:22 +0800 |
|---|---|---|
| committer | Jason Liu <r64343@freescale.com> | 2012-07-20 13:38:52 +0800 |
| commit | f0523b4a017a326c8f9e2ba9a4b686c500d61b63 (patch) | |
| tree | b0bf9bbe3324daf6927c3a751904f2014a48557c /arch/arm/mach-mx6/clock_mx6sl.c | |
| parent | ca9d2e496ab8f09142d781dc24b13528faa5da9d (diff) | |
ENGR00213903 [MX6]Improve periph parent change flow
When bus freq is changed, we need to update periph
clk's parent, better to use clk_set_parent API instead
of changing the parent directly.
Signed-off-by: Anson Huang <b20788@freescale.com>
Diffstat (limited to 'arch/arm/mach-mx6/clock_mx6sl.c')
| -rwxr-xr-x | arch/arm/mach-mx6/clock_mx6sl.c | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/mach-mx6/clock_mx6sl.c b/arch/arm/mach-mx6/clock_mx6sl.c index e1a4e0032c2f..a223f452c4b6 100755 --- a/arch/arm/mach-mx6/clock_mx6sl.c +++ b/arch/arm/mach-mx6/clock_mx6sl.c @@ -464,6 +464,10 @@ static void _clk_pll_disable(struct clk *clk) unsigned int reg; void __iomem *pllbase; + if ((arm_needs_pll2_400) && (clk == &pll2_528_bus_main_clk)) + return; + + pllbase = _get_pll_base(clk); reg = __raw_readl(pllbase); |