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authorDaniel Stone <daniel.stone@nokia.com>2009-01-27 19:13:05 -0700
committerRussell King <rmk+kernel@arm.linux.org.uk>2009-02-08 17:50:26 +0000
commit712d7c860269018fc92169e0f6b42218fd82a6d1 (patch)
tree95aca9d71d8f2eea839e3fdea62c88f5bef0bc12 /arch/arm/mach-omap2/clock34xx.h
parent9cfd985e27bfdf1e120aecaf595db265f4b5eb27 (diff)
[ARM] OMAP2: Fix definition of SGX clock register bits
The GFX/SGX functional and interface clocks have different masks, for some unknown reason, so split EN_SGX_SHIFT into one each for fclk and iclk. Correct according to the TRM and the far more important 'does this actually work at all?' metric. linux-omap source commit is de1121fdb899f762b9e717f44eaf3fae7c00cd3e. Signed-off-by: Daniel Stone <daniel.stone@nokia.com> Signed-off-by: Tony Lindgren <tony@atomide.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-omap2/clock34xx.h')
-rw-r--r--arch/arm/mach-omap2/clock34xx.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm/mach-omap2/clock34xx.h b/arch/arm/mach-omap2/clock34xx.h
index 2c84717f9528..6b39ad476336 100644
--- a/arch/arm/mach-omap2/clock34xx.h
+++ b/arch/arm/mach-omap2/clock34xx.h
@@ -1293,7 +1293,7 @@ static struct clk sgx_fck = {
.ops = &clkops_omap2_dflt_wait,
.init = &omap2_init_clksel_parent,
.enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_FCLKEN),
- .enable_bit = OMAP3430ES2_EN_SGX_SHIFT,
+ .enable_bit = OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT,
.clksel_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_CLKSEL),
.clksel_mask = OMAP3430ES2_CLKSEL_SGX_MASK,
.clksel = sgx_clksel,
@@ -1307,7 +1307,7 @@ static struct clk sgx_ick = {
.parent = &l3_ick,
.init = &omap2_init_clk_clkdm,
.enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN),
- .enable_bit = OMAP3430ES2_EN_SGX_SHIFT,
+ .enable_bit = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT,
.clkdm_name = "sgx_clkdm",
.recalc = &followparent_recalc,
};