diff options
| author | Rajendra Nayak <rnayak@ti.com> | 2009-06-09 22:30:41 +0530 |
|---|---|---|
| committer | Kevin Hilman <khilman@deeprootsystems.com> | 2009-11-11 14:42:28 -0800 |
| commit | f265dc4c5d39f2bd369d97c87a7bd89061b159d4 (patch) | |
| tree | db16053ad7010c141a054ab0c8b5c243c311962f /arch/arm/mach-omap2/pm34xx.c | |
| parent | 3a7ec26bb44988051d97479f6dfcfd4942a99049 (diff) | |
OMAP3: PM: Program SDRC to send self refresh on timeout of AUTO_CNT
Due to an OMAP3 errata (1.142), on HS/EMU devices SDRC should be
programed to issue automatic self refresh on timeout
of AUTO_CNT = 1 prior to any transition to OFF mode.
This is needed only on sil rev's ES3.0 and above.
This patch enables the above needed WA in the SDRC power register
value stored in scratchpad, so that ROM code restores this value
in SDRC POWER on the wakeup path.
The original SDRC POWER register value is stored and restored back
in omap_sram_idle() function.
This fixes some random crashes observed while stressing suspend
on HS/EMU devices.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Signed-off-by: Kalle Jokiniemi <kalle.jokiniemi@digia.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>
Diffstat (limited to 'arch/arm/mach-omap2/pm34xx.c')
| -rw-r--r-- | arch/arm/mach-omap2/pm34xx.c | 24 |
1 files changed, 7 insertions, 17 deletions
diff --git a/arch/arm/mach-omap2/pm34xx.c b/arch/arm/mach-omap2/pm34xx.c index 511a57dc7015..01b95eaae75a 100644 --- a/arch/arm/mach-omap2/pm34xx.c +++ b/arch/arm/mach-omap2/pm34xx.c @@ -48,12 +48,6 @@ #include "pm.h" #include "sdrc.h" -#define SDRC_POWER_AUTOCOUNT_SHIFT 8 -#define SDRC_POWER_AUTOCOUNT_MASK (0xffff << SDRC_POWER_AUTOCOUNT_SHIFT) -#define SDRC_POWER_CLKCTRL_SHIFT 4 -#define SDRC_POWER_CLKCTRL_MASK (0x3 << SDRC_POWER_CLKCTRL_SHIFT) -#define SDRC_SELF_REFRESH_ON_AUTOCOUNT (0x2 << SDRC_POWER_CLKCTRL_SHIFT) - /* Scratchpad offsets */ #define OMAP343X_TABLE_ADDRESS_OFFSET 0x31 #define OMAP343X_TABLE_VALUE_OFFSET 0x30 @@ -402,19 +396,15 @@ static void omap_sram_idle(void) } /* - * Force SDRAM controller to self-refresh mode after timeout on - * autocount. This is needed on ES3.0 to avoid SDRAM controller - * hang-ups. - */ + * On EMU/HS devices ROM code restores a SRDC value + * from scratchpad which has automatic self refresh on timeout + * of AUTO_CNT = 1 enabled. This takes care of errata 1.142. + * Hence store/restore the SDRC_POWER register here. + */ if (omap_rev() >= OMAP3430_REV_ES3_0 && omap_type() != OMAP2_DEVICE_TYPE_GP && - core_next_state == PWRDM_POWER_OFF) { + core_next_state == PWRDM_POWER_OFF) sdrc_pwr = sdrc_read_reg(SDRC_POWER); - sdrc_write_reg((sdrc_pwr & - ~(SDRC_POWER_AUTOCOUNT_MASK|SDRC_POWER_CLKCTRL_MASK)) | - (1 << SDRC_POWER_AUTOCOUNT_SHIFT) | - SDRC_SELF_REFRESH_ON_AUTOCOUNT, SDRC_POWER); - } /* * omap3_arm_context is the location where ARM registers @@ -424,7 +414,7 @@ static void omap_sram_idle(void) _omap_sram_idle(omap3_arm_context, save_state); cpu_init(); - /* Restore normal SDRAM settings */ + /* Restore normal SDRC POWER settings */ if (omap_rev() >= OMAP3430_REV_ES3_0 && omap_type() != OMAP2_DEVICE_TYPE_GP && core_next_state == PWRDM_POWER_OFF) |