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authorKukjin Kim <kgene.kim@samsung.com>2010-08-06 21:34:55 +0900
committerKukjin Kim <kgene.kim@samsung.com>2010-08-06 21:34:55 +0900
commitf2b7e3c54a304677a1142829fb5913595885379f (patch)
tree1eb941524c7325672f947dab525d96228b362e20 /arch/arm/mach-s5pc100
parent6b8eda04ffdc24b68d379a32358f4f09a425a380 (diff)
parent0fdb480e7fb1ecdd4076ddf8b6ab16b0d77406c1 (diff)
Merge branch 'next-s5p' into for-next
Conflicts: arch/arm/mach-s5pv210/mach-aquila.c arch/arm/mach-s5pv210/mach-goni.c
Diffstat (limited to 'arch/arm/mach-s5pc100')
-rw-r--r--arch/arm/mach-s5pc100/include/mach/irqs.h2
-rw-r--r--arch/arm/mach-s5pc100/include/mach/system.h9
-rw-r--r--arch/arm/mach-s5pc100/mach-smdkc100.c30
3 files changed, 17 insertions, 24 deletions
diff --git a/arch/arm/mach-s5pc100/include/mach/irqs.h b/arch/arm/mach-s5pc100/include/mach/irqs.h
index bfcc0b9d7ad7..06513e647242 100644
--- a/arch/arm/mach-s5pc100/include/mach/irqs.h
+++ b/arch/arm/mach-s5pc100/include/mach/irqs.h
@@ -29,7 +29,7 @@
#define IRQ_GPIOINT S5P_IRQ_VIC0(30)
/* VIC1: ARM, power, memory, connectivity */
-#define IRQ_CORTEX0 S5P_IRQ_VIC1(0)
+#define IRQ_PMU S5P_IRQ_VIC1(0)
#define IRQ_CORTEX1 S5P_IRQ_VIC1(1)
#define IRQ_CORTEX2 S5P_IRQ_VIC1(2)
#define IRQ_CORTEX3 S5P_IRQ_VIC1(3)
diff --git a/arch/arm/mach-s5pc100/include/mach/system.h b/arch/arm/mach-s5pc100/include/mach/system.h
index 681f626a9ae1..a9ea57c06600 100644
--- a/arch/arm/mach-s5pc100/include/mach/system.h
+++ b/arch/arm/mach-s5pc100/include/mach/system.h
@@ -11,18 +11,11 @@
#ifndef __ASM_ARCH_SYSTEM_H
#define __ASM_ARCH_SYSTEM_H __FILE__
-#include <linux/io.h>
-#include <mach/map.h>
-#include <mach/regs-clock.h>
+#include <plat/system-reset.h>
static void arch_idle(void)
{
/* nothing here yet */
}
-static void arch_reset(char mode, const char *cmd)
-{
- __raw_writel(S5PC100_SWRESET_RESETVAL, S5PC100_SWRESET);
- return;
-}
#endif /* __ASM_ARCH_IRQ_H */
diff --git a/arch/arm/mach-s5pc100/mach-smdkc100.c b/arch/arm/mach-s5pc100/mach-smdkc100.c
index 83a5d648a980..a63c8a46571d 100644
--- a/arch/arm/mach-s5pc100/mach-smdkc100.c
+++ b/arch/arm/mach-s5pc100/mach-smdkc100.c
@@ -49,16 +49,16 @@
#include <plat/ts.h>
/* Following are default values for UCON, ULCON and UFCON UART registers */
-#define S5PC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
+#define SMDKC100_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
S3C2410_UCON_RXILEVEL | \
S3C2410_UCON_TXIRQMODE | \
S3C2410_UCON_RXIRQMODE | \
S3C2410_UCON_RXFIFO_TOI | \
S3C2443_UCON_RXERR_IRQEN)
-#define S5PC100_ULCON_DEFAULT S3C2410_LCON_CS8
+#define SMDKC100_ULCON_DEFAULT S3C2410_LCON_CS8
-#define S5PC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
+#define SMDKC100_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
S3C2440_UFCON_RXTRIG8 | \
S3C2440_UFCON_TXTRIG16)
@@ -66,30 +66,30 @@ static struct s3c2410_uartcfg smdkc100_uartcfgs[] __initdata = {
[0] = {
.hwport = 0,
.flags = 0,
- .ucon = S5PC100_UCON_DEFAULT,
- .ulcon = S5PC100_ULCON_DEFAULT,
- .ufcon = S5PC100_UFCON_DEFAULT,
+ .ucon = SMDKC100_UCON_DEFAULT,
+ .ulcon = SMDKC100_ULCON_DEFAULT,
+ .ufcon = SMDKC100_UFCON_DEFAULT,
},
[1] = {
.hwport = 1,
.flags = 0,
- .ucon = S5PC100_UCON_DEFAULT,
- .ulcon = S5PC100_ULCON_DEFAULT,
- .ufcon = S5PC100_UFCON_DEFAULT,
+ .ucon = SMDKC100_UCON_DEFAULT,
+ .ulcon = SMDKC100_ULCON_DEFAULT,
+ .ufcon = SMDKC100_UFCON_DEFAULT,
},
[2] = {
.hwport = 2,
.flags = 0,
- .ucon = S5PC100_UCON_DEFAULT,
- .ulcon = S5PC100_ULCON_DEFAULT,
- .ufcon = S5PC100_UFCON_DEFAULT,
+ .ucon = SMDKC100_UCON_DEFAULT,
+ .ulcon = SMDKC100_ULCON_DEFAULT,
+ .ufcon = SMDKC100_UFCON_DEFAULT,
},
[3] = {
.hwport = 3,
.flags = 0,
- .ucon = S5PC100_UCON_DEFAULT,
- .ulcon = S5PC100_ULCON_DEFAULT,
- .ufcon = S5PC100_UFCON_DEFAULT,
+ .ucon = SMDKC100_UCON_DEFAULT,
+ .ulcon = SMDKC100_ULCON_DEFAULT,
+ .ufcon = SMDKC100_UFCON_DEFAULT,
},
};