diff options
| author | Timo Alho <talho@nvidia.com> | 2013-12-22 12:30:15 +0200 |
|---|---|---|
| committer | Juha Tukkinen <jtukkinen@nvidia.com> | 2013-12-27 04:42:20 -0800 |
| commit | e98ef6c5eb70da9d1208304f3cd45f4b5babc270 (patch) | |
| tree | 05b2bc76c2c59707fd7497203d9b5cc7acea8997 /arch/arm/mach-tegra/board-ardbeg.h | |
| parent | fcc19da5f302df4a5df1cafa4025950072defdce (diff) | |
ARM: tegra: ardbeg: enable OC interrupt support from soc_therm
Bug 1413373
Change-Id: I471f7a5dcea8ec86f5651e59bf97ad9ed1cd3e90
Signed-off-by: Timo Alho <talho@nvidia.com>
Reviewed-on: http://git-master/r/348415
Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com>
Reviewed-by: Juha Tukkinen <jtukkinen@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/board-ardbeg.h')
| -rw-r--r-- | arch/arm/mach-tegra/board-ardbeg.h | 8 |
1 files changed, 6 insertions, 2 deletions
diff --git a/arch/arm/mach-tegra/board-ardbeg.h b/arch/arm/mach-tegra/board-ardbeg.h index 477d0796d3be..357cbf27d9a3 100644 --- a/arch/arm/mach-tegra/board-ardbeg.h +++ b/arch/arm/mach-tegra/board-ardbeg.h @@ -57,6 +57,10 @@ void shield_sysedp_batmon_init(void); #define MPU_BMP_NAME "bmp280" #define MPU_BMP_ADDR 0x77 +/* generated soc_therm OC interrupts */ +#define TEGRA_SOC_OC_IRQ_BASE TEGRA_NR_IRQS +#define TEGRA_SOC_OC_NUM_IRQ TEGRA_SOC_OC_IRQ_MAX + /* PCA954x I2C bus expander bus addresses */ #define PCA954x_I2C_BUS_BASE 6 #define PCA954x_I2C_BUS0 (PCA954x_I2C_BUS_BASE + 0) @@ -66,7 +70,7 @@ void shield_sysedp_batmon_init(void); #define PALMAS_TEGRA_GPIO_BASE TEGRA_NR_GPIOS -#define PALMAS_TEGRA_IRQ_BASE TEGRA_NR_IRQS +#define PALMAS_TEGRA_IRQ_BASE (TEGRA_SOC_OC_IRQ_BASE + TEGRA_SOC_OC_NUM_IRQ) #define AS3722_GPIO_BASE TEGRA_NR_GPIOS #define AS3722_GPIO_END (AS3722_GPIO_BASE + AS3722_NUM_GPIO) @@ -76,7 +80,7 @@ void shield_sysedp_batmon_init(void); #define PMU_TCA6416_NR_GPIOS 18 /* External peripheral act as interrupt controller */ /* AS3720 IRQs */ -#define AS3722_IRQ_BASE TEGRA_NR_IRQS +#define AS3722_IRQ_BASE (TEGRA_SOC_OC_IRQ_BASE + TEGRA_SOC_OC_NUM_IRQ) #define CAM_RSTN TEGRA_GPIO_PBB3 #define CAM_FLASH_STROBE TEGRA_GPIO_PBB4 |