ARM: tegra: vcm30t124: Add CPU and GPU regulator

Register CPU and GPU regulator for vcm30t124 board. This is required
because voltage will be set based on speedo in kernel.

Bug 1410210

Change-Id: Ifd875c92661c22fbed2538b3ea20d186e2f59086
Signed-off-by: Ashwin Joshi <asjoshi@nvidia.com>
Reviewed-on: http://git-master/r/354163
Reviewed-by: Sandeep Trasi <strasi@nvidia.com>
Tested-by: Sandeep Trasi <strasi@nvidia.com>

1 files changed, 74 insertions, 0 deletions

diff --git a/arch/arm/mach-tegra/board-vcm30_t124-power.c b/arch/arm/mach-tegra/board-vcm30_t124-power.c
index c3c93e8a4e81..2873acf44e5b 100644
--- a/arch/arm/mach-tegra/board-vcm30_t124-power.c
+++ b/arch/arm/mach-tegra/board-vcm30_t124-power.c
@@ -140,6 +140,78 @@ static struct i2c_board_info __initdata max77663_regulators[] = {
 	},
 };
 
+/* MAX15569 switching regulator for vdd_cpu */
+static struct regulator_consumer_supply max15569_vddcpu_supply[] = {
+	REGULATOR_SUPPLY("vdd_cpu", NULL),
+};
+
+static struct regulator_init_data max15569_vddcpu_init_data = {
+	.constraints = {
+		.min_uV = 500000,
+		.max_uV = 1520000,
+		.valid_modes_mask = (REGULATOR_MODE_NORMAL |
+				REGULATOR_MODE_STANDBY),
+		.valid_ops_mask = (REGULATOR_CHANGE_MODE |
+				REGULATOR_CHANGE_STATUS |
+				REGULATOR_CHANGE_CONTROL |
+				REGULATOR_CHANGE_VOLTAGE),
+		.always_on = 1,
+		.boot_on =  1,
+		.apply_uV = 0,
+	},
+	.num_consumer_supplies = ARRAY_SIZE(max15569_vddcpu_supply),
+	.consumer_supplies = max15569_vddcpu_supply,
+};
+
+static struct max15569_regulator_platform_data max15569_vddcpu_pdata = {
+	.reg_init_data = &max15569_vddcpu_init_data,
+	.max_voltage_uV = 1520000,
+	.slew_rate_mv_per_us = 44,
+};
+
+static struct i2c_board_info __initdata max15569_vddcpu_boardinfo[] = {
+	{
+		I2C_BOARD_INFO("max15569", 0x3a),
+		.platform_data  = &max15569_vddcpu_pdata,
+	},
+};
+
+/* MAX15569 switching regulator for vdd_gpu */
+static struct regulator_consumer_supply max15569_vddgpu_supply[] = {
+	REGULATOR_SUPPLY("vdd_gpu", NULL),
+};
+
+static struct regulator_init_data max15569_vddgpu_init_data = {
+	.constraints = {
+		.min_uV = 500000,
+		.max_uV = 1520000,
+		.valid_modes_mask = (REGULATOR_MODE_NORMAL |
+				REGULATOR_MODE_STANDBY),
+		.valid_ops_mask = (REGULATOR_CHANGE_MODE |
+				REGULATOR_CHANGE_STATUS |
+				REGULATOR_CHANGE_CONTROL |
+				REGULATOR_CHANGE_VOLTAGE),
+		.always_on = 0,
+		.boot_on =  0,
+		.apply_uV = 0,
+	},
+	.num_consumer_supplies = ARRAY_SIZE(max15569_vddgpu_supply),
+	.consumer_supplies = max15569_vddgpu_supply,
+};
+
+static struct max15569_regulator_platform_data max15569_vddgpu_pdata = {
+	.reg_init_data = &max15569_vddgpu_init_data,
+	.max_voltage_uV = 1400000,
+	.slew_rate_mv_per_us = 44,
+};
+
+static struct i2c_board_info __initdata max15569_vddgpu_boardinfo[] = {
+	{
+		I2C_BOARD_INFO("max15569", 0x38),
+		.platform_data  = &max15569_vddgpu_pdata,
+	},
+};
+
 #ifdef CONFIG_ARCH_TEGRA_HAS_CL_DVFS
 /* board parameters for cpu dfll */
 static struct tegra_cl_dvfs_cfg_param vcm30_t124_cl_dvfs_param = {
@@ -217,6 +289,8 @@ int __init vcm30_t124_regulator_init(void)
 	vcm30_t124_cl_dvfs_init();
 #endif
 	vcm30_t124_max77663_regulator_init();
+	i2c_register_board_info(4, max15569_vddcpu_boardinfo, 1);
+	i2c_register_board_info(4, max15569_vddgpu_boardinfo, 1);
 
 	return 0;
 }