summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra/clock.h
diff options
context:
space:
mode:
authorLaxman Dewangan <ldewangan@nvidia.com>2011-12-28 14:21:16 +0530
committerVarun Wadekar <vwadekar@nvidia.com>2012-01-04 11:44:57 +0530
commitf24c4131ebf2a59e7d6c81fb338a856b36432691 (patch)
tree4e2cdf6363549fa0c47b384927adf01ed82a1d9f /arch/arm/mach-tegra/clock.h
parentf37e8ecb37b05ec0794d17bb1e7f461135d387f6 (diff)
tegra3: clock: Support for divisor 15.1
Uart clock source has divisor of 16 bits where LSB is 0.5. Adding support for divisor 15.1 and configuring uart for use the 15.1 type divisor. Signed-off-by: Laxman Dewangan <ldewangan@nvidia.com> Change-Id: Ifdd77041e7abb43026bbfb273f6e12923d64d607 Reviewed-on: http://git-master/r/70324 Reviewed-by: Laxman Dewangan <ldewangan@nvidia.com> Tested-by: Laxman Dewangan <ldewangan@nvidia.com> Reviewed-by: Automatic_Commit_Validation_User Reviewed-by: Bitan Biswas <bbiswas@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r--arch/arm/mach-tegra/clock.h3
1 files changed, 2 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index 3f159ced1103..25ba88bc4893 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -48,11 +48,12 @@
#define PLLX (1 << 15)
#define MUX_PWM (1 << 16)
#define MUX8 (1 << 17)
-#define DIV_U71_UART (1 << 18)
+#define DIV_U151_UART (1 << 18)
#define MUX_CLK_OUT (1 << 19)
#define PLLM (1 << 20)
#define DIV_U71_INT (1 << 21)
#define DIV_U71_IDLE (1 << 22)
+#define DIV_U151 (1 << 23)
#define ENABLE_ON_INIT (1 << 28)
#define PERIPH_ON_APB (1 << 29)
#define PERIPH_ON_CBUS (1 << 30)