diff options
| author | Prashant Gaikwad <pgaikwad@nvidia.com> | 2011-11-15 19:59:47 +0530 |
|---|---|---|
| committer | Dan Willemsen <dwillemsen@nvidia.com> | 2011-11-30 21:50:11 -0800 |
| commit | 21a64ae60c23b4c74dbb7674b676bd04fc99f448 (patch) | |
| tree | 63e00aeda380599afb92105c968b480f31b17b62 /arch/arm/mach-tegra/clock.h | |
| parent | e6afdf3d64560938b0272e20563397e996324633 (diff) | |
ARM: tegra: clock: Enable EMC scaling for AP25
Workaround added to enable EMC scaling for AP25.
PLL switching support added for 300MHz EMC scaling step.
Bug 892505
Reviewed-on: http://git-master/r/#change,41718
Reviewed-on: http://git-master/r/#change,41720
Reviewed-on: http://git-master/r/#change,60861
Change-Id: I885b8dc4e3b6124ebed572c06cea773de6c83471
Reviewed-on: http://git-master/r/64465
Reviewed-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Tested-by: Rohan Somvanshi <rsomvanshi@nvidia.com>
Rebase-Id: Rb8e58cfa7fe1106978030c8aea292e95a7a5da2b
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
| -rw-r--r-- | arch/arm/mach-tegra/clock.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h index a04b2f1ccdec..d0914668398f 100644 --- a/arch/arm/mach-tegra/clock.h +++ b/arch/arm/mach-tegra/clock.h @@ -229,6 +229,7 @@ unsigned long clk_get_max_rate(struct clk *c); unsigned long clk_get_min_rate(struct clk *c); unsigned long clk_get_rate_locked(struct clk *c); int clk_set_rate_locked(struct clk *c, unsigned long rate); +int clk_set_parent_locked(struct clk *c, struct clk *parent); int tegra_clk_shared_bus_update(struct clk *c); void tegra2_sdmmc_tap_delay(struct clk *c, int delay); int tegra_emc_set_rate(unsigned long rate); |