summaryrefslogtreecommitdiff
path: root/arch/arm/mach-tegra/clock.h
diff options
context:
space:
mode:
authorSang-Hun Lee <sanlee@nvidia.com>2012-07-27 09:57:54 -0700
committerLokesh Pathak <lpathak@nvidia.com>2012-07-30 08:39:29 -0700
commite9e4bc232f2698d166f7c63bd5434c352083682a (patch)
treee47a37e36e382e35c3a09aa169ba43648e1aaebb /arch/arm/mach-tegra/clock.h
parente402db9b3737209c9981aea5970328d7c1cb06ce (diff)
ARM: tegra: clock: increase Tegra3 pll post-lock delay
Bug 1022877 Change-Id: I9200d3345a933ab0ccb31f833184ee4a621228f0 Reviewed-on: http://git-master/r/118774 Reviewed-by: Aleksandr Frid <afrid@nvidia.com> Reviewed-by: Sang-Hun Lee <sanlee@nvidia.com> Tested-by: Sang-Hun Lee <sanlee@nvidia.com> Reviewed-by: Prajakta Gudadhe <pgudadhe@nvidia.com>
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r--arch/arm/mach-tegra/clock.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index 888808461bb9..c27176b1cc0d 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -27,7 +27,7 @@
#else
#define USE_PLL_LOCK_BITS 1 /* Use lock bits for PLL stabiliation */
#define USE_PLLE_SS 1 /* Use spread spectrum coefficients for PLLE */
-#define PLL_POST_LOCK_DELAY 2 /* Safety delay after lock is detected */
+#define PLL_POST_LOCK_DELAY 50 /* Safety delay after lock is detected */
#endif
#define DIV_BUS (1 << 0)