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authorColin Cross <ccross@android.com>2011-02-12 16:05:31 -0800
committerColin Cross <ccross@android.com>2011-02-21 00:10:11 -0800
commitf151961173bf28047d01b410969f05e485f56d7e (patch)
tree02a9d357cf99d2002b98c8a18002322ef5c5c3d8 /arch/arm/mach-tegra/clock.h
parent3ec349fbf1e88e84d4dffc54b6cb32129a32b7b0 (diff)
ARM: tegra: clock: Move unshared clk struct members into union
Creates a union of a struct for each type of clock to reduce memory usage and clarify which members are used by all clocks and which are used by a single type. Acked-by: Olof Johansson <olof@lixom.net> Signed-off-by: Colin Cross <ccross@android.com>
Diffstat (limited to 'arch/arm/mach-tegra/clock.h')
-rw-r--r--arch/arm/mach-tegra/clock.h85
1 files changed, 44 insertions, 41 deletions
diff --git a/arch/arm/mach-tegra/clock.h b/arch/arm/mach-tegra/clock.h
index 198f2344d02f..20f0ce69bbaf 100644
--- a/arch/arm/mach-tegra/clock.h
+++ b/arch/arm/mach-tegra/clock.h
@@ -47,7 +47,7 @@ struct clk_mux_sel {
u32 value;
};
-struct clk_pll_table {
+struct clk_pll_freq_table {
unsigned long input_rate;
unsigned long output_rate;
u16 n;
@@ -74,51 +74,54 @@ enum clk_state {
struct clk {
/* node for master clocks list */
- struct list_head node;
- struct list_head children; /* list of children */
- struct list_head sibling; /* node for children */
-#ifdef CONFIG_DEBUG_FS
- struct dentry *dent;
- struct dentry *parent_dent;
-#endif
- struct clk_ops *ops;
- struct clk *parent;
- struct clk_lookup lookup;
- unsigned long rate;
- unsigned long max_rate;
- u32 flags;
- u32 refcnt;
- const char *name;
- u32 reg;
- u32 reg_shift;
- unsigned int clk_num;
- enum clk_state state;
+ struct list_head node; /* node for list of all clocks */
+ struct list_head children; /* list of children */
+ struct list_head sibling; /* node for children */
+ struct clk_lookup lookup;
+
#ifdef CONFIG_DEBUG_FS
- bool set;
+ struct dentry *dent;
+ bool set;
#endif
+ struct clk_ops *ops;
+ unsigned long rate;
+ unsigned long max_rate;
+ u32 flags;
+ const char *name;
+
+ u32 refcnt;
+ enum clk_state state;
+ struct clk *parent;
+ u32 div;
+ u32 mul;
- /* PLL */
- unsigned long input_min;
- unsigned long input_max;
- unsigned long cf_min;
- unsigned long cf_max;
- unsigned long vco_min;
- unsigned long vco_max;
- const struct clk_pll_table *pll_table;
- int pll_lock_delay;
-
- /* DIV */
- u32 div;
- u32 mul;
-
- /* MUX */
const struct clk_mux_sel *inputs;
- u32 sel;
- u32 reg_mask;
+ u32 reg;
+ u32 reg_shift;
- /* Virtual cpu clock */
- struct clk *main;
- struct clk *backup;
+ union {
+ struct {
+ unsigned int clk_num;
+ } periph;
+ struct {
+ unsigned long input_min;
+ unsigned long input_max;
+ unsigned long cf_min;
+ unsigned long cf_max;
+ unsigned long vco_min;
+ unsigned long vco_max;
+ const struct clk_pll_freq_table *freq_table;
+ int lock_delay;
+ } pll;
+ struct {
+ u32 sel;
+ u32 reg_mask;
+ } mux;
+ struct {
+ struct clk *main;
+ struct clk *backup;
+ } cpu;
+ } u;
};